KESRX05
Pin
15
Name
DSN
Function
Data slice reference level
The DSN pin is defined internally by the Slice volt-
age V
REF
. The DSN slice voltage can be offset from
the internal reference V
REF
by connecting a resistor
from the DSN pin to V
EE
and/or the peak detector
output.
For further information please refer to the Baseband
section of the Functional Description.
Schematic
DF2
3k
DSN
100k
VREF
(V
BE
)
V
EE
HYSTERESIS
25mV
3k
16
LF
PLL loop filter connection
UP
The phase detector output current is derived by two
internal current sources. The nominal linear average
output current is
115µA
(5µA/radian).
For further information please refer to the Phase Lock
Loop VCO section of the Functional Description
17
18
V
EE
VCO2
Negative supply
Voltage controlled oscillator
The voltage controlled oscillator circuit is designed
from two cross coupled transistors. The centre fre-
quency of the VCO is set by the external tank circuit.
For further information please refer to the Voltage
Controlled Oscillator (VCO) Circuit Design / Layout
section of the Functional Description
19
20
VCO1
DF2
Voltage controlled oscillator
Data Filter Output
The data filter is configured as a unity gain amplifier
with a low impedance output. Tracking of the received
baseband signal is achieved by an internal current
source.
For further information please refer to the Baseband
section of the Functional description.
21
DF1
Data filter input
Input to data filter. Bandwidth of second order Sallen
and Key data filter is set by external components
R10, R1 1, C5 and C6.
For further information please refer to the Baseband
section of the Functional Description.
Table 1 Pin descriptions (continued)
1
15µA
LF
DOWN
2
15µA
V
CC
1·4k
50
VCO1
1·4k
50
VCO2
300µA
See pin 18
DF2
3k
DSN
100k
VREF
(V
BE
)
V
EE
HYSTERESIS
25mV
3k
DF1
Cont…
5
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