R
3
9
Platform Flash In-System Programmable
Configuration PROMS
Preliminary Product Specification
DS123 (v2.4) July 20, 2004
0
Features
•
•
•
•
•
•
•
•
•
•
In-System Programmable PROMs for Configuration of
Xilinx FPGAs
Low-Power Advanced CMOS FLASH Process
Endurance of 20,000 Program/Erase Cycles
Operation over Full Industrial Temperature Range
(–40°C to +85°C)
IEEE Standard 1149.1/1532 Boundary-Scan (JTAG)
Support for Programming, Prototyping, and Testing
JTAG Command Initiation of Standard FPGA
Configuration
Cascadable for Storing Longer or Multiple Bitstreams
Dedicated Boundary-Scan (JTAG) I/O Power Supply
(V
CCJ
)
I/O Pins Compatible with Voltage Levels Ranging From
1.5V to 3.3V
Design Support Using the Xilinx Alliance ISE and
Foundation ISE Series Software Packages
•
•
XCF01S/XCF02S/XCF04S
- 3.3V supply voltage
- Serial FPGA configuration interface (up to 33 MHz)
- Available in small-footprint VO20 and VOG20
packages.
XCF08P/XCF16P/XCF32P
- 1.8V supply voltage
- Serial or parallel FPGA configuration interface
(up to 33 MHz)
- Available in small-footprint VO48, VOG48, FS48,
and FSG48 packages
- Design revision technology enables storing and
accessing multiple design revisions for
configuration
- Built-in data decompressor compatible with Xilinx
advanced compression technology
Table 1:
Platform Flash PROM Features
Density
V
CCINT
V
CCO
/ V
CCJ
Range
Packages
JTAG ISP
Serial
Parallel
Programming Configuration Configuration
Design
Revisioning
Compression
XCF01S
XCF02S
XCF04S
XCF08P
XCF16P
XCF32P
1 Mbit
2 Mbit
4 Mbit
8 Mbit
16 Mbit
32 Mbit
3.3V
3.3V
3.3V
1.8V
1.8V
1.8V
1.8V - 3.3V
1.8V - 3.3V
1.8V - 3.3V
1.5V - 3.3V
1.5V - 3.3V
1.5V - 3.3V
VO20/VOG28
VO20/VOG28
VO20/VOG28
VO48/VOG48
FS48/FSG48
VO48/VOG48
FS48/FSG48
VO48/VOG48
FS48/FSG48
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
Description
Xilinx introduces the Platform Flash series of in-system pro-
grammable configuration PROMs. Available in 1 to 32
Megabit (Mbit) densities, these PROMs provide an
easy-to-use, cost-effective, and reprogrammable method
for storing large Xilinx FPGA configuration bitstreams. The
Platform Flash PROM series includes both the 3.3V
XCFxxS PROM and the 1.8V XCFxxP PROM. The XCFxxS
version includes 4-Mbit, 2-Mbit, and 1-Mbit PROMs that
support Master Serial and Slave Serial FPGA configuration
modes (Figure
1).
The XCFxxP version includes 32-Mbit,
16-Mbit, and 8-Mbit PROMs that support Master Serial,
Slave Serial, Master SelectMAP, and Slave SelectMAP
FPGA configuration modes (Figure
2).
A summary of the
Platform Flash PROM family members and supported fea-
tures is shown in
© 2004 Xilinx, Inc. All rights reserved. All Xilinx trademarks, registered trademarks, patents, and disclaimers are as listed at
All other trademarks and registered trademarks are the property of their respective owners. All specifications are subject to change without notice.
DS123 (v2.4) July 20, 2004
Preliminary Product Specification
1-800-255-7778
1
XILINX [ XILINX, INC ]
