R
Platform Flash In-System Programmable Configuration PROMS
AC Characteristics Over Operating Conditions When Cascading
OE/RESET
CE
CLK
CLKOUT
(optional)
DATA
Last Bit
T
CDF
T
CODF
T
OCE
T
OOE
First Bit
T
OCK
T
COCE
CEO
ds123_23_102203
Symbol
Description
CLK to output float delay
(2,3)
when V
CCO
= 2.5V or 3.3V
CLK to output float delay
(2,3)
when V
CCO
= 1.8V
CLK to CEO delay
(3,5)
when V
CCO
= 2.5V or 3.3V
CLK to CEO delay
(3,5)
when V
CCO
= 1.8V
CE to CEO delay
(3,6)
when V
CCO
= 2.5V or 3.3V
CE to CEO delay
(3,6)
when V
CCO
= 1.8V
OE/RESET to CEO delay
(3)
when V
CCO
= 2.5V or 3.3V
OE/RESET to CEO delay
(3)
when V
CCO
= 1.8V
CLKOUT to CEO delay when V
CCO
= 2.5V or 3.3V
CLKOUT to CEO delay when V
CCO
= 1.8V
CLKOUT to output float delay
when V
CCO
= 2.5V or 3.3V
CLKOUT to output float delay when V
CCO
= 1.8V
XCF01S, XCF02S,
XCF04S
Min
–
–
–
–
–
–
–
–
–
–
–
–
XCF08P, XCF16P,
XCF32P
Min
–
–
–
–
–
–
–
–
–
–
–
–
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Max
25
35
20
35
20
35
20
35
–
–
–
–
Max
20
20
20
20
80
80
80
80
20
20
25
25
T
CDF
T
OCK
T
OCE
T
OOE
T
COCE
T
CODF
Notes:
1. AC test load = 50 pF for XCF01S/XCF02S/XCF04S; 30 pF for XCF08P/XCF16P/XCF32P.
2. Float delays are measured with 5 pF AC loads. Transition is measured at ±200 mV from steady state active levels.
3. Guaranteed by design, not tested.
4. All AC parameters are measured with V
IL
= 0.0V and V
IH
= 3.0V.
5. For cascaded PROMs, if the FPGA’s dual-purpose configuration data pins are set to persist as configuration pins, the minimum
period is increased based on the CLK to CEO and CE to data propagation delays:
- T
CYC
minimum = T
OCK
+ T
CE
+ FPGA Data setup time.
- T
CAC
maximum = T
OCK
+ T
CE
6. For cascaded PROMs, if the FPGA’s dual-purpose configuration data pins become general I/O pins after configuration; to allow for
the disable to propagate to the cascaded PROMs and to avoid contention on the data lines following configuration, the minimum
period is increased based on the CE to CEO and CE to data propagation delays:
- T
CYC
minimum = T
OCE
+ T
CE
- T
CAC
maximum = T
OCK
+ T
CE
DS123 (v2.9) May 09, 2006
36
XILINX [ XILINX, INC ]
