XC9536XL High Performance CPLD
R
AC Characteristics
XC9536XL-5
Symbol
T
PD
T
SU
T
H
T
CO
T
PSU
T
PH
T
PCO
T
OE
T
OD
T
POE
T
POD
T
AO
T
PAO
T
WLH
T
PLH
I/O to output valid
I/O setup time before GCK
I/O hold time after GCK
GCK to output valid
I/O setup time before p-term clock input
I/O hold time after p-term clock input
P-term clock output valid
GTS to output valid
GTS to output disable
Product term OE to output enabled
Product term OE to output disabled
GSR to output valid
P-term S/R to output valid
GCK pulse width (High or Low)
P-term clock pulse width (High or Low)
Parameter
Min
-
3.7
0
-
-
1.7
2.0
-
-
-
-
-
-
-
2.8
5.0
5.0
Max
5.0
-
-
3.5
178.6
-
-
5.5
4.0
4.0
7.0
7.0
10.0
10.5
-
-
-
XC9536XL-7
Min
-
4.8
0
-
-
1.6
3.2
-
-
-
-
-
-
-
4.0
6.5
6.5
Max
7.5
-
-
4.5
125
-
-
7.7
5.0
5.0
9.5
9.5
12.0
12.6
-
-
-
XC9536XL-10
Min
-
6.5
0
-
-
2.1
4.4
-
-
-
-
-
-
-
4.5
7.0
7.0
Max
10.0
-
-
5.8
100
-
-
10.2
7.0
7.0
11.0
11.0
14.5
15.3
-
-
-
Units
ns
ns
ns
ns
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
f
SYSTEM
Multiple FB internal operating frequency
T
APRPW
Asynchronous preset/reset pulse width (High or Low)
V
TEST
R
1
Device Output
R
2
C
L
Output Type
V
CCIO
3.3V
2.5V
V
TEST
3.3V
2.5V
R
1
320
Ω
250
Ω
R
2
360
Ω
660
Ω
C
L
35 pF
35 pF
DS058_03_081500
Figure 3:
AC Load Circuit
4
DS058 (v1.9) April 3, 2007
Product Specification
XILINX [ XILINX, INC ]
