R
XC95288XV High-Performance CPLD
DC Characteristics Over Recommended Operating Conditions
Symbol
Parameter
Test Conditions
Min
2.4
Max
Units
V
Output high voltage for 3.3V outputs
Output high voltage for 2.5V outputs
Output high voltage for 1.8V outputs
I
I
I
= –4.0 mA
= –1.0 mA
= –100 µA
-
-
-
V
V
V
OH
OH
OH
OH
2.0
90%
V
CCIO
V
Output low voltage for 3.3V outputs
Output low voltage for 2.5V outputs
Output low voltage for 1.8V outputs
Input leakagelow current
I
I
I
= 8.0 mA
= 1.0 mA
= 100 µA
-
0.4
0.4
0.4
10
V
V
OL
OL
OL
OL
-
-
-
V
I
V
V
V
= 2.62V
µA
IL
CC
= 3.6V
CCIO
= GND or 3.6V
IN
I
Input leakage high current
I/O capacitance
V
V
V
= 2.62V
-
-
10
10
µA
IH
CC
= 3.6V
CCIO
= GND or 3.6V
IN
C
V
= GND
pF
IN
IN
f = 1.0 MHz
I
Operating Supply Current
(low power mode, active)
V = GND, No load
f = 1.0 MHz
59
mA
CC
I
AC Characteristics
XC95288XV-5
Min Max
XC95288XV-7
XC95288XV-10
Symbol
Parameter
Min
Max
7.5
-
Min
Max
10
Units
ns
T
T
I/O to output valid
-
3.5
0
5.0
-
4.8
0
-
6.5
0
PD
SU
I/O setup time before GCK
I/O hold time after GCK
GCK to output valid
-
-
-
ns
T
-
-
ns
H
T
-
3.5
222.2
-
4.5
125.0
-
5.8
100.0
ns
CO
f
Multiple FB internal operating
frequency
-
-
-
MHz
SYSTEM
T
I/O setup time before p-term clock
input
1.0
-
1.6
-
2.1
-
ns
PSU
T
I/O hold time after p-term clock input
P-term clock output valid
2.5
-
3.2
-
4.4
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
PH
T
-
6.0
4.0
4.0
7.0
7.0
10.0
10.7
-
-
7.7
5.0
5.0
9.5
9.5
12.0
12.6
-
-
10.2
7.0
7.0
11.0
11.0
14.5
15.3
-
PCO
T
GTS to output valid
-
-
-
OE
T
GTS to output disable
-
-
-
OD
T
T
Product term OE to output enabled
Product term OE to output disabled
GSR to output valid
-
-
-
-
-
-
POE
POD
T
-
-
-
AO
T
P-term S/R to output valid
-
-
-
PAO
WLH
T
GCK pulse width (High or Low)
P-term clock pulse width (High or Low)
2.2
5.0
4.0
6.5
5.0
7.0
T
-
-
-
PLH
Advance Information
Preliminary Information
Notes:
1. Please contact Xilinx for up-to-date information on advance specifications.
4
www.xilinx.com
DS050 (v2.2) August 27, 2001
1-800-255-7778
Advance Product Specification