欢迎访问ic37.com |
会员登录 免费注册
发布采购

XC3S200A-4FTG256C 参数 Datasheet PDF下载

XC3S200A-4FTG256C图片预览
型号: XC3S200A-4FTG256C
PDF下载: 下载PDF文件 查看货源
内容描述: [Field Programmable Gate Array, 448 CLBs, 200000 Gates, 250MHz, 4032-Cell, CMOS, PBGA256, LEAD FREE, FPTBGA-256]
分类和应用: 时钟可编程逻辑
文件页数/大小: 132 页 / 3936 K
品牌: XILINX [ XILINX, INC ]
 浏览型号XC3S200A-4FTG256C的Datasheet PDF文件第8页浏览型号XC3S200A-4FTG256C的Datasheet PDF文件第9页浏览型号XC3S200A-4FTG256C的Datasheet PDF文件第10页浏览型号XC3S200A-4FTG256C的Datasheet PDF文件第11页浏览型号XC3S200A-4FTG256C的Datasheet PDF文件第13页浏览型号XC3S200A-4FTG256C的Datasheet PDF文件第14页浏览型号XC3S200A-4FTG256C的Datasheet PDF文件第15页浏览型号XC3S200A-4FTG256C的Datasheet PDF文件第16页  
DC and Switching Characteristics  
Power Supply Specifications  
Table 5: Supply Voltage Thresholds for Power-On Reset  
Symbol  
VCCINTT  
VCCAUXT  
VCCO2T  
Description  
Threshold for the VCCINT supply  
Min  
0.4  
1.0  
1.0  
Max  
1.0  
Units  
V
V
V
Threshold for the VCCAUX supply  
2.0  
Threshold for the VCCO Bank 2 supply  
2.0  
Notes:  
1.  
V
, V  
, and V  
supplies to the FPGA can be applied in any order. However, the FPGA’s configuration source (Platform Flash,  
CCO  
CCINT CCAUX  
SPI Flash, parallel NOR Flash, microcontroller) might have specific requirements. Check the data sheet for the attached configuration  
source. Apply V  
information).  
last for lowest overall power consumption (see UG331 chapter “Powering Spartan-3 Generation FPGAs” for more  
CCINT  
2. To ensure successful power-on, V  
no dips at any point.  
, V  
Bank 2, and V  
supplies must rise through their respective threshold-voltage ranges with  
CCAUX  
CCINT CCO  
Table 6: Supply Voltage Ramp Rate  
Symbol  
Description  
Min  
0.2  
0.2  
0.2  
Max  
100  
100  
100  
Units  
ms  
VCCINTR  
VCCAUXR  
VCCO2R  
Ramp rate from GND to valid VCCINT supply level  
Ramp rate from GND to valid VCCAUX supply level  
Ramp rate from GND to valid VCCO Bank 2 supply level  
ms  
ms  
Notes:  
1.  
V
, V  
, and V  
supplies to the FPGA can be applied in any order. However, the FPGA’s configuration source (Platform Flash,  
CCO  
CCINT CCAUX  
SPI Flash, parallel NOR Flash, microcontroller) might have specific requirements. Check the data sheet for the attached configuration  
source. Apply V  
information).  
last for lowest overall power consumption (see UG331 chapter "Powering Spartan-3 Generation FPGAs" for more  
CCINT  
2. To ensure successful power-on, V  
no dips at any point.  
, V  
Bank 2, and V  
supplies must rise through their respective threshold-voltage ranges with  
CCAUX  
CCINT CCO  
Table 7: Supply Voltage Levels Necessary for Preserving CMOS Configuration Latch (CCL) Contents and RAM  
Data  
Symbol  
VDRINT  
VDRAUX  
Description  
Min  
1.0  
2.0  
Units  
VCCINT level required to retain CMOS Configuration Latch (CCL) and RAM data  
VCCAUX level required to retain CMOS Configuration Latch (CCL) and RAM data  
V
V
12  
www.xilinx.com  
DS529-3 (v2.0) August 19, 2010