Pinout Descriptions
FG676: 676-ball Fine-pitch Ball Grid Array
The 676-ball fine-pitch ball grid array, FG676, supports the
XC3S1400A FPGA.
Table 87: Spartan-3A FG676 Pinout(Continued)
FG676
Ball
Bank
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Pin Name
IO_L15N_0
Type
I/O
Table 87 lists all the FG676 package pins. They are sorted
by bank number and then by pin name. Pairs of pins that
form a differential I/O pair appear together in the table. The
table also shows the pin number for each pin and the pin
type, as defined earlier.
A19
B19
H15
G15
C18
D18
A18
B18
B17
C17
E15
F15
C16
D17
C15
D16
A15
B15
F14
E14
J14
IO_L15P_0
I/O
IO_L16N_0
I/O
IO_L16P_0
I/O
The XC3S1400A has 17 unconnected balls, indicated as
N.C. (No Connection) in Table 87 and with the black
diamond character () in Table 87 and Figure 27.
IO_L17N_0
I/O
IO_L17P_0
I/O
An electronic version of this package pinout table and
footprint diagram is available for download from the Xilinx
website at:
IO_L18N_0
I/O
IO_L18P_0
I/O
IO_L19N_0
I/O
www.xilinx.com/support/documentation/data_sheets/
s3a_pin.zip.
IO_L19P_0
I/O
IO_L20N_0/VREF_0
IO_L20P_0
VREF
I/O
Pinout Table
IO_L21N_0
I/O
Table 87: Spartan-3A FG676 Pinout
IO_L21P_0
I/O
FG676
Bank
0
Pin Name
IO_L01N_0
Ball
F20
G20
F19
G19
C22
D22
C23
D23
A22
B23
G17
H17
B21
C21
D21
E21
C20
D20
K16
J16
Type
I/O
IO_L22N_0
I/O
IO_L22P_0
I/O
0
IO_L01P_0
IO_L02N_0
IO_L02P_0/VREF_0
IO_L05N_0
IO_L05P_0
IO_L06N_0
IO_L06P_0
IO_L07N_0
IO_L07P_0
IO_L08N_0
IO_L08P_0
IO_L09N_0
IO_L09P_0
IO_L10N_0
IO_L10P_0
IO_L11N_0
IO_L11P_0
IO_L12N_0
IO_L12P_0
IO_L13N_0
IO_L13P_0
IO_L14N_0
IO_L14P_0/VREF_0
I/O
IO_L23N_0
I/O
0
I/O
IO_L23P_0
I/O
0
VREF
I/O
IO_L24N_0
I/O
0
IO_L24P_0
I/O
0
I/O
IO_L25N_0/GCLK5
IO_L25P_0/GCLK4
IO_L26N_0/GCLK7
IO_L26P_0/GCLK6
IO_L27N_0/GCLK9
IO_L27P_0/GCLK8
IO_L28N_0/GCLK11
IO_L28P_0/GCLK10
IO_L29N_0
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
I/O
0
I/O
K14
A14
B14
G13
F13
C13
B13
B12
A12
C12
D13
F12
E12
D11
C11
B10
A10
0
I/O
0
I/O
0
I/O
0
I/O
0
I/O
0
I/O
0
I/O
0
I/O
IO_L29P_0
I/O
0
I/O
IO_L30N_0
I/O
0
I/O
IO_L30P_0
I/O
0
I/O
IO_L31N_0
I/O
0
I/O
IO_L31P_0
I/O
0
I/O
IO_L32N_0/VREF_0
IO_L32P_0
VREF
I/O
0
E17
F17
A20
B20
I/O
0
I/O
IO_L33N_0
I/O
0
I/O
IO_L33P_0
I/O
0
VREF
DS529-4 (v2.0) August 19, 2010
www.xilinx.com
119
XILINX [ XILINX, INC ]
