Pinout Descriptions
Table 81: Spartan-3A FG400 Pinout(Continued)
FG400
Bank
Pin Name
Ball
E17
E4
Type
VCCAUX TDO
JTAG
VCCAUX TMS
JTAG
VCCAUX VCCAUX
VCCAUX VCCAUX
VCCAUX VCCAUX
VCCAUX VCCAUX
VCCAUX VCCAUX
VCCAUX VCCAUX
VCCAUX VCCAUX
VCCAUX VCCAUX
VCCINT VCCINT
VCCINT VCCINT
VCCINT VCCINT
VCCINT VCCINT
VCCINT VCCINT
VCCINT VCCINT
VCCINT VCCINT
VCCINT VCCINT
VCCINT VCCINT
A13
E16
H1
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
K13
L8
N20
T5
Y8
J10
J12
K9
K11
L10
L12
M9
M11
N10
User I/Os by Bank
Table 82 indicates how the 311 available user-I/O pins are
distributed between the four I/O banks on the FG400
package. The AWAKE pin is counted as a dual-purpose I/O.
Table 82: User I/Os Per Bank for the XC3S400A and XC3S700A in the FG400 Package
All Possible I/O Pins by Type
Package
I/O Bank
Maximum I/O
Edge
I/O
INPUT
DUAL
VREF
CLK
8
Top
0
1
2
3
77
79
50
12
1
6
8
Right
Bottom
Left
21
12
30
21
0
8
76
35
6
6
8
79
49
16
6
8
TOTAL
311
155
46
52
26
32
Footprint Migration Differences
The XC3S400A and XC3S700A FPGAs have identical
footprints in the FG400 package. Designs can migrate
between the XC3S400A and XC3S700A FPGAs without
further consideration.
106
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DS529-4 (v2.0) August 19, 2010
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