R
XC3000 Series Field Programmable Gate Arrays
Figure 15: Programmable Interconnection of Longlines. This is provided at the edges of the routing area.
Three-state buffers allow the use of horizontal Longlines to form on-chip wired AND and multiplexed buses. The left two
non-clock vertical Longlines per column (except XC3020A) and the outer perimeter Longlines may be programmed as
connectable half-length lines.
V
V
CC
CC
Z = D • D • D
•
• D
... N
A
B
C
(LOW)
D
D
D
C
D
N
X3036
A
B
Figure 16: 3-State Buffers Implement a Wired-AND Function. When all the buffer 3-state lines are High, (high
impedance), the pull-up resistor(s) provide the High output. The buffer inputs are driven by the control signals or a Low.
Z = DA • A + DB • B + DC • C + … + DN • N
DA
A
DB
B
DC
C
DN
N
WEAK
KEEPER CIRCUIT
X1741A
Figure 17: 3-State Buffers Implement a Multiplexer. The selection is accomplished by the buffer 3-state signal.
7-16
November 9, 1998 (Version 3.1)
XILINX [ XILINX, INC ]
