DDR2-400, 533
Single Rank, x8 Registered SDRAM DIMMs
Functional Block Diagram:
Single Rank 32M x 72 (256MB), 64M x 72 (512MB), 128M x 72 (1GB), and 256M x 72 (2GB) DDR2 Registered
SDRAM DIMM (x8 organization)
RCS0#
DQS4
DQS4#
DQS0
DQS0#
DM4/DQS13
DM0/DQS9
NU/
DM/ CS# DQS# DQS
NU/
DM/ CS# DQS# DQS
DQS9#
RDQS# RDQS
DQS13#
RDQS# RDQS
U0
U4
DQ[0:7]
DQ[32:39]
8
8
DQS5
DQS1
DQS5#
DQS1#
DM5/DQS14
DM1/DQS10
NU/
DM/ CS# DQS# DQS
NU/
DM/ CS# DQS# DQS
DQS14#
RDQS# RDQS
DQS10#
RDQS# RDQS
U5
U1
DQ[40:47]
DQ[8:15]
8
8
DQS6
DQS2
DQS6#
DQS2#
DM6/DQS15
DM2/DQS11
NU/
DM/ CS# DQS# DQS
NU/
DM/ CS# DQS# DQS
DQS15#
RDQS# RDQS
DQS11#
RDQS# RDQS
U6
U2
DQ[48:55]
DQ[16:23]
8
8
DQS7
DQS3
DQS3#
DQS7#
DM7/DQS16
DM3/DQS12
NU/
DM/ CS# DQS# DQS
NU/
DM/ CS# DQS# DQS
DQS16#
RDQS# RDQS
DQS12#
RDQS# RDQS
U7
U3
DQ[56:63]
DQ[24:31]
8
8
DQS8
DQS8#
DM8/DQS17
VDDSPD
NU/
DM/ CS# DQS# DQS
To SPD
DQS17#
RDQS# RDQS
VDD/VDDQ
To U0 - U8
To U0 - U8
To U0 - U8
U8
VREF
CB[0:7]
Vss
8
SERIAL PD
SDA
SCL
A0
SA0
A1 A2
BA0-BA1
A0-A13
RAS#
RBA0-RBA1 -> BA0-BA1 to U0 - U8
RA0-RA13 -> A0-A13 to U0 - U8
RRAS# -> RAS# to U0 - U8
RCAS# -> CAS# to U0 - U8
RWE# -> WE# to U0 - U8
RCKE0 -> CKE0 to U0 - U8
RODT0 -> ODT0 to U0 - U8
RS0# -> CS0# to U0 - U8
SA1 SA2
R
E
G
I
CAS#
WE#
S
T
E
R
CK to U0 - U8
P
L
L
CK0
CKE0
CK# to U0 - U8
CK0#
ODT0
CS0#*
RESET#
CK to all registers
CK# to all registers
RESET#
RST#
Note:
1. *) CS0# connects to DCS# of Register 1 and CSR# of Register 2;
CSR# of Register 1 and DCS# of Register 2 connects to VDD
2. DQ/DM/DQS, address and control resistor values are 22 Ohms.
DDR2_RDIMM_1 rank_x8_spec
Rev. 1.0 - December, 04
Wintec Industries, Inc., reserves the right to change datasheets and/or products without any notice.
2004 Wintec Industries, Inc.
3
XILINX [ XILINX, INC ]
