R
MultiPRO Desktop Tool
Table 6: SelectMAP Port: 34-Pin Ribbon Cable Connector Interface Pin Descriptions (Cont’d)
Ribbon Cable Pin
Number
SelectMAP
Configuration Mode
Type
Description
28
30
32
34
33
31
PROG
CS2
CS1
CS0
VREF
NC
OUT
OUT
OUT
OUT
IN
Configuration Reset
Chip Select 2
Chip Select 1
Chip Select 0
Target reference voltage
No Connection
Digital Ground
–
1, 3, 5, 7, 9, 11, 13,
15, 17, 19, 21, 23,
25, 27, 29
Gnd
–
Table 7: Adapter Port: 20-Pin DIN Connector Interface Pin Descriptions
DIN
JTAG
Pin Number
Configuration Mode
Type
Description
A8
TCK
OUT
Test Clock. This is the clock signal for JTAG operations. It is
connected to the ‘TCK’ pin on the adapter socket.
A2
TMS
OUT
Test Mode Select. This is the JTAG mode signal that establishes
appropriate TAP state transitions for the target device. It is
connected to the ‘TMS’ pin on the adapter socket.
A4
A6
TDI
OUT
IN
Test Data In. This is the serial input data stream for JTAG
operations and is connected to the ‘TDI’ pin on the adapter socket.
TDO
Test Data Out. This is the serial output data stream for JTAG
operations and is connected to the ‘TDO’ pin on the adapter socket.
A1
B4
PEN
ID1
OUT
IN
Port Enable. Reserved for future applications.
Adapter ID1. This is the high order bit for the automatic adapter
identification circuit.
A3
B1
ID0
IN
IN
Adapter ID0. This is the low order bit for the automatic adapter
identification circuit.
VREF
Adapter Reference Voltage. This voltage is established by a local
linear regulator on each device adapter according to the
specifications of the device family.
B7, B8, B9, A10,
B10
+5V DC
OUT
Switched Supply Voltage.
A9
EGND
GND
–
–
Safety Ground.
Digital Ground.
A5, B5, B6, A7
DS114 (v1.9) February 8, 2008
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Product Specification
9
XILINX [ XILINX, INC ]
