Virtex-6 FPGA ML605 eVALuAtion Kit
What’s Inside the ML605 Evaluation Kit
• ML605 Base Board with the XC6VLX240T-1FFG1 FPGA
156
®
• ISE Design Suite Logic Edition: (device-locked) for
Virtex-6 LX240T FPGA
• Documentation
– Hardware Setup Guide
– Getting Started Guide
– Hardware user Guide
– Reference Designs user Guide
• Schematics and PCB files
• universal 12V power supply
• Cables: 2 uSB, 1 Ethernet
• DVI to VGA adapter
• Reference Designs and Demos
- Board Diagnostic Demo
- Base System Reference Design featuring DSP48,
Gigabit Ethernet, DDR3 Memory Controller, DVI,
System Monitor, and Serial Transceiver integration
- PCI Express Gen 2 (x4)
- PCI Express Gen 1 (x8)
- DDR3 Memory Interface
- IBERT
- Multiboot Reference Design, featuring self-test/update
and configuration
- Hardened Memory Controller Reference Design
• Reference designs, demos, documentation, and
applications delivered on uSB FLASH drive to get
started quickly
B OAR D F EATu R ES
User Clock
(J55-J58)
FMC
(LPC)
Configuration
USB 2.0
Mode Switch
(Host)
12V ATX Power
System ACE
FMC
USB 2.0
Address
(HPC)
12V Wall Power
(Device)
DDR3
SFP
GPIO LEDs
GPIO DIP Switch (SW1)
USB to UART (J21)
MGT Clock (J30 & J31)
USB JTAG (J22)
Ethernet
DVI Output
Platform Flash
MGT Port
Push Buttons
(U27)
(J26-J29)
(SW5-SW9)
X8 PCI Express
16x2 LCD Character
BPI Flash
Display
(U4)
System ACE
Prog (SW4)
SystemACE RST (SW3)
CPU RST (SW10)
PMBus Controller
System Monitor Headers
PMBus (J3)
Take the NEXT STEP
For more information, support, documents, and reference designs, or to purchase, please visit
www.xilinx.com/ml605
Part Number: EK-V6-ML605-G
Corporate Headquarters
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USA
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Tel: +65-6407-3000
www.xilinx.com
© Copyright 2009 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Spartan, ISE and other designated brands included herein are
trademarks of Xilinx in the United States and other countries. All other trademarks are the property of their respective owners.
Printed in the U.S.A. PN 2424
XILINX [ XILINX, INC ]
