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5962-9957401NUX 参数 Datasheet PDF下载

5962-9957401NUX图片预览
型号: 5962-9957401NUX
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文件页数/大小: 31 页 / 249 K
品牌: XILINX [ XILINX, INC ]
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R
QPro Virtex 2.5V QML High-Reliability FPGAs  
Table 3: Virtex QFP Package Pinout Information (Continued)  
Pin Name  
Device  
XQV100  
XQV300  
XQV600  
PQ/HQ240  
... + 12  
VREF, Bank 7 (VREF pins are listed incrementally. Connect all pins  
listed for both the required device and all smaller devices listed in the  
same package.)  
... + 5  
... + 11  
Within each bank, if input reference voltage is not required, all VREF  
pins are general I/O.  
GND  
All  
1, 8, 14, 22, 29, 37, 45, 51,  
59, 69, 75, 83, 91, 98,  
106, 112, 119, 129, 135,  
143, 151, 158, 166, 172,  
182, 190, 196, 204, 211,  
219, 227, 233  
Table 4: Virtex Plastic Ball Grid and Ceramic Column Grid Pinout Information  
Pin Name  
Device  
All  
All  
All  
All  
All  
All  
All  
All  
All  
All  
All  
All  
All  
All  
All  
All  
All  
All  
All  
All  
All  
All  
All  
All  
All  
All  
All  
BG256  
Y11  
Y10  
A10  
B10  
Y1  
BG352  
AE13  
AF14  
B14  
D14  
AD24  
AB23  
AC23  
C3  
BG432  
BG560/CG560  
AL17  
AJ17  
D17  
A17  
AJ29  
AK30  
AN32  
C4  
GCK0  
GCK1  
GCK2  
GCK3  
M0  
AL16  
AK16  
A16  
D17  
AH28  
AH29  
AJ28  
D4  
M1  
U3  
M2  
W2  
CCLK  
PROGRAM  
DONE  
INIT  
B19  
Y20  
W19  
U18  
D18  
C19  
E20  
G19  
J19  
M19  
P19  
T20  
V19  
A19  
B18  
C17  
A20  
D3  
AC4  
AD3  
AD2  
E4  
AH3  
AH4  
AJ2  
D3  
AM1  
AJ5  
AH5  
D4  
BUSY/DOUT  
D0/DIN  
D1  
D3  
C2  
E4  
G1  
K4  
K3  
D2  
J3  
K2  
L4  
D3  
M3  
P4  
P3  
D4  
R3  
V4  
W4  
D5  
U4  
AB1  
AB3  
AG4  
B4  
AB5  
AC4  
AJ4  
D6  
D6  
V3  
D7  
AC3  
D5  
WRITE  
CS  
C4  
D5  
A2  
TDI  
B3  
B3  
D5  
TDO  
TMS  
TCK  
D4  
C4  
E6  
D23  
C24  
AD23  
D29  
D28  
AH27  
B33  
E29  
AK29  
A1  
DXN  
W3  
DS002 (v1.5) December 5, 2001  
www.xilinx.com  
19  
Preliminary Product Specification  
1-800-255-7778  
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