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5962-9957401NUX 参数 Datasheet PDF下载

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型号: 5962-9957401NUX
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文件页数/大小: 31 页 / 249 K
品牌: XILINX [ XILINX, INC ]
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R
QPro Virtex 2.5V QML High-Reliability FPGAs  
QPro Virtex Pinouts  
Pinout Tables  
See the Xilinx WebLINX web site (http://www.xil-  
inx.com/partinfo/databook.htm) for updates or additional  
pinout information. For convenience, Table 3, Table 4 and  
Table 5 list the locations of special-purpose and power-sup-  
ply pins. Pins not listed are user I/Os.  
Table 3: Virtex QFP Package Pinout Information  
Pin Name  
Device  
All  
All  
All  
All  
All  
All  
All  
All  
All  
All  
All  
All  
All  
All  
All  
All  
All  
All  
All  
All  
All  
All  
All  
All  
All  
All  
All  
PQ/HQ240  
92  
GCK0  
GCK1  
GCK2  
GCK3  
M0  
89  
210  
213  
60  
M1  
58  
M2  
62  
CCLK  
PROGRAM  
DONE  
INIT  
179  
122  
120  
123  
178  
177  
167  
163  
156  
145  
138  
134  
124  
185  
184  
183  
181  
2
BUSY/DOUT  
D0/DIN  
D1  
D2  
D3  
D4  
D5  
D6  
D7  
WRITE  
CS  
TDI  
TDO  
TMS  
TCK  
239  
VCCINT  
16, 32, 43, 77, 88, 104,  
137, 148, 164, 198, 214,  
225  
VCCO  
All  
15, 30, 44, 61, 76, 90,  
105, 121, 136, 150, 165,  
180, 197, 212, 226, 240  
(The VCCO for the PQ/HQ240 package is common to all eight I/O  
banks. Different output standards per I/O bank that require different  
VCCO values cannot be supported.)  
DS002 (v1.5) December 5, 2001  
www.xilinx.com  
17  
Preliminary Product Specification  
1-800-255-7778  
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