DC Characteristics Over Operating Conditions
Symbol
V
OH
V
OL
V
OH
V
OL
V
CCPD
I
CCPD
Description
High-level output voltage (@ I
OH
= –4.0 mA, V
CC
min)
Commercial
Low-level output voltage (@ I
OL
= 4.0 mA, V
CC
min)
High-level output voltage (@ I
OH
= –4.0 mA, V
CC
min
)
Industrial
Low-level output voltage (@ I
OL
= 4.0 mA, V
CC
min
)
Power-down supply voltage (PWRDWN must be Low)
Power-down supply current (V
CC(MAX)
@ T
MAX
)
1
XC3020
XC3030
XC3042
XC3064
XC3090
I
CCO
Quiescent LCA supply current in addition to I
CCPD2
Chip thresholds programmed as CMOS levels
Chip thresholds programmed as TTL levels
I
IL
C
IN
Input Leakage Current
Input capacitance, all packages except PGA175
(sample tested)
All Pins except XTL1 and XTL2
XTL1 and XTL2
Input capacitance, PGA 175
(sample tested)
All Pins except XTL1 and XTL2
XTL1 and XTL2
I
RIN
I
RLL
Pad pull-up (when selected) @ V
IN
= 0 V (sample tested)
Horizontal Longline pull-up (when selected) @ logic Low
0.02
–10
2.30
50
80
120
170
250
0.40
V
V
µA
µA
µA
µA
µA
µA
mA
µA
3.76
0.40
V
V
Min
3.86
Max
Units
V
500
10
+10
10
15
pF
pF
15
20
0.17
3.4
pF
pF
mA
mA
Note: 1. Devices with much lower I
CCPD
tested and guaranteed at V
CC
= 3.2 V, T = 25°C can be ordered with a
Special Product Code.
XC3020 SPC0107: I
CCPD
= 1
µA
XC3030 SPC0107: I
CCPD
= 2
µA
XC3042 SPC0107: I
CCPD
= 3
µA
XC3064 SPC0107: I
CCPD
= 4
µA
XC3090 SPC0107: I
CCPD
= 5
µA
2. With no output current loads, no active input or Longline pull-up resistors, all package pins at V
CC
or GND,
and the LCA configured with a MakeBits tie option.
2-155
XILINX [ XILINX, INC ]
