R
Spartan-II/Spartan-IIE Family OTP Configuration PROMs (XC17S00A)
Standby Mode
The PROM enters a low-power standby mode whenever CE
is asserted High. The output remains in a high-impedance
state regardless of the state of the OE input.
Programming Spartan-II/Spartan-IIE
Family PROMs
The devices can be programmed on programmers supplied
by Xilinx or qualified third-party vendors. The user must
ensure that the appropriate programming algorithm and the
latest version of the programmer software are used. The
wrong choice can permanently damage the device.
VCC
GND
RESET/
OE
or
OE/
RESET
CE
CLK
Address Counter
TC
EPROM
Cell
Matrix
Output
OE
DATA
DS030_02_011300
Figure 2:
Simplified Block Diagram (does not show programming circuit)
Important:
Always tie the two V
CC
pins together in your application.
Table 2:
Truth Table for XC17S00A Control Inputs
Control Inputs
RESET
(1)
Inactive
Active
Inactive
Active
CE
Low
Low
High
High
Internal Address
(2)
If address < TC: increment
If address > TC: don’t change
Held reset
Not changing
Held reset
DATA
Active
High-Z
High-Z
High-Z
High-Z
Outputs
I
CC
Active
Reduced
Active
Standby
Standby
Notes:
1. The XC17S00A RESET input has programmable polarity
2. TC = Terminal Count = highest address value. TC + 1 = address 0.
DS078 (v1.8) November 18, 2002
Advance Product Specification
1-800-255-7778
5
XILINX [ XILINX, INC ]
