X9250
PIN DESCRIPTIONS
Serial Output (SO)
V /R (V /R –V /R
)
W
W
W0 W0 W3 W3
The wiper pins are equivalent to the wiper terminal of
a mechanical potentiometer.
SO is a serial data output pin. During a read cycle,
data is shifted out on this pin. Data is clocked out by
the falling edge of the serial clock.
Hardware Write Protect Input (WP)
Serial Input
The WP pin when LOW prevents nonvolatile writes to
the Data Registers.
SI is the serial data input pin. All opcodes, byte
addresses and data to be written to the pots and pot
registers are input on this pin. Data is latched by the
rising edge of the serial clock.
Analog Supplies (V+, V-)
The analog supplies V+, V- are the supply voltages for
the XDCP analog section.
Serial Clock (SCK)
The SCK input is used to clock data into and out of the
X9250.
PIN CONFIGURATION
SOIC/TSSOP
Chip Select (CS)
When CS is HIGH, the X9250 is deselected and the
SO pin is at high impedance, and (unless an internal
write cycle is underway) the device will be in the
standby state. CS LOW enables the X9250, placing it
in the active power mode. It should be noted that after
a power-up, a HIGH to LOW transition on CS is
required prior to the start of any operation.
S0
A0
1
2
24
23
22
21
20
19
18
17
16
15
HOLD
SCK
V
/R
3
V
V
V
/R
W3 W3
L2 L2
V
/R
4
/R
H3 H3
H2 L2
/R
5
V
/R
W2 W2
L3 L3
V–
V+
6
X9250
V
7
V
V
V
CC
SS
V
/R
/R
8
L0 L0
Hold (HOLD)
W1 W1
/R
V
/R
9
H1 H1
H0 H0
HOLD is used in conjunction with the CS pin to select
the device. Once the part is selected and a serial
sequence is underway, HOLD may be used to pause
the serial communication with the controller without
resetting the serial sequence. To pause, HOLD must
be brought LOW while SCK is LOW. To resume
communication, HOLD is brought HIGH, again while
SCK is LOW. If the pause feature is not used, HOLD
should be held HIGH at all times.
V
/R
10
V
/R
W0 W0
L1 L1
CS
11
12
14
13
A1
SI
WP
CSP
2
1
3
4
A
R
R
L1
CS
W0
1
A
B
C
D
E
F
R
R
SI
W1
Device Address (A –A )
L0 WP
0
1
The address inputs are used to set the least significant
2 bits of the 8-bit slave address. A match in the slave
address serial data stream must be made with the
address input in order to initiate communication with
the X9250. A maximum of 4 devices may occupy the
SPI serial bus.
V
R
H0
R V
H1 SS
CC
R
R
V+
R
V-
H2
H3
SO HOLDR
L3
W2
L2
R
A SCK R
0
W3
Potentiometer Pins
Top View–Bumps Down
V /R (V /R –V /R ), V /R (V /R –V /R )
H
H
H0 H0 H3 H3
L
L
L0 L0 L3 L3
The R and R pins are equivalent to the terminal
H
L
connections on a mechanical potentiometer.
Characteristics subject to change without notice. 2 of 21
REV 1.1.5 1/31/03
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XICOR [ XICOR INC. ]
