X5001
PRINCIPLES OF OPERATION
Power On Reset
To set the new V
threshold voltage to the Vcc pin and tie the W pin to the
programming voltage V . Then a V
voltage, apply the desired V
TRIP TRIP
PE
programming
P
TRIP
command sequence is sent to the device over the SPI
interface. This V programming sequence consists of
pulling CS LOW, then clocking in data 03h, 00h and 01h.
This is followed by bringing CS HIGH then LOW and
clocking in data 02h, 00h, and 01h (in order) and bringing
Application of power to the X5001 activates a Power On
Reset Circuit. This circuit goes active at 1V and pulls the
RESET/RESET pin active. This signal prevents the sys-
tem microprocessor from starting to operate with insuffi-
cient voltage or prior to stabilization of the oscillator.When
TRIP
CS HIGH. This initiates the V
programming
TRIP
Vcc exceeds the device V
value for 200ms (nominal)
TRIP
sequence.V is brought LOW to end the operation.
P
the circuit releases RESET, allowing the processor to
begin executing code.
Resetting the V
Voltage
TRIP
This procedure is used to set the V
to a “native” volt-
TRIP
Low voltage monitoring
age level. For example, if the current V
is 4.4V and
must be 4.0V, then the V must be
TRIP
TRIP
the new V
During operation, the X5001 monitors the V
level and
TRIP
CC
reset. When V
is reset, the new V
is something
asserts RESET if supply voltage falls below a preset mini-
mum V .The RESET signal prevents the microproces-
TRIP
TRIP
less than 1.7V. This procedure must be used to set the
voltage to a lower value.
TRIP
sor from operating in a power fail or brownout condition.
The RESET signal remains active until the voltage drops
below 1V. It also remains active until Vcc returns and
To reset the V
voltage, apply greater than 3V to the
TRIP
Vcc pin and tie the W pin to the programming voltage
PE
exceeds V
for 200ms.
TRIP
Vp. Then a V
command sequence is sent to the
TRIP
device over the SPI interface. This V
programming
TRIP
watchdog timer
sequence consists of pulling CS LOW, then clocking in
data 03h, 00h and 01h. This is followed by bringing CS
HIGH then LOW and clocking in data 02h, 00h, and 03h
The Watchdog Timer circuit monitors the microprocessor
activity by monitoring the WDI input. The microprocessor
must toggle the CS/WDI pin periodically to prevent a
RESET signal. The CS/WDI pin must be toggled from
HIGH to LOW prior to the expiration of the watchdog time-
out period. The state of two nonvolatile control bits in the
Watchdog Register determine the watchdog timer period.
(in order) and bringing CS HIGH. This initiates the V
TRIP
programming sequence. V is brought LOW to end the
P
operation.
VccThreshold Reset Procedure
The X5001 is shipped with a standard Vcc threshold
(V
) voltage. This value will not change over normal
TRIP
operating and storage conditions. However, in applica-
tions where the standard V is not exactly right, or if
TRIP
higher precision is needed in the V
value, the X5001
TRIP
threshold may be adjusted. The procedure is described
below, and requires the application of a high voltage con-
trol signal.
Setting the V
Voltage
TRIP
This procedure is used to set the V
to a higher volt-
TRIP
age value. For example, if the current V
is 4.4V and
TRIP
the new V
is 4.6V, this procedure will directly make
TRIP
the change. If the new setting is to be lower than the cur-
rent setting, then it is necessary to reset the trip point
before setting the new value.
3
XICOR [ XICOR INC. ]
