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X28C64S-15 参数 Datasheet PDF下载

X28C64S-15图片预览
型号: X28C64S-15
PDF下载: 下载PDF文件 查看货源
内容描述: 5伏,可变的字节E2PROM [5 Volt, Byte Alterable E2PROM]
分类和应用: 存储内存集成电路光电二极管可编程只读存储器电动程控只读存储器电可擦编程只读存储器
文件页数/大小: 25 页 / 112 K
品牌: XICOR [ XICOR INC. ]
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64K  
X28C64  
5 Volt, Byte Alterable E2PROM  
DESCRIPTION  
8K x 8 Bit  
FEATURES  
150ns Access Time  
The X28C64 is an 8K x 8 E2PROM, fabricated with  
Xicor’s proprietary, high performance, floating gate  
CMOS technology. Like all Xicor programmable non-  
volatile memories the X28C64 is a 5V only device. The  
X28C64 features the JEDEC approved pinout for byte-  
widememories,compatiblewithindustrystandardRAMs.  
Simple Byte and Page Write  
—Single 5V Supply  
—No External High Voltages or VPP Control  
Circuits  
—Self-Timed  
—No Erase Before Write  
—No Complex Programming Algorithms  
—No Overerase Problem  
The X28C64 supports a 64-byte page write operation,  
effectively providing a 78µs/byte write cycle and en-  
abling the entire memory to be typically written in 0.625  
seconds. The X28C64 also features DATA and Toggle  
Bit Polling, a system software support scheme used to  
indicate the early completion of a write cycle. In addi-  
tion, theX28C64includesauser-optionalsoftwaredata  
protection mode that further enhances Xicor’s hard-  
ware write protect capability.  
Low Power CMOS  
—60mA Active Current Max.  
—200µA Standby Current Max.  
Fast Write Cycle Times  
—64 Byte Page Write Operation  
—Byte or Page Write Cycle: 5ms Typical  
—Complete Memory Rewrite: 0.625 sec. Typical  
—Effective Byte Write Cycle Time: 78µs Typical  
Software Data Protection  
End of Write Detection  
Xicor E2PROMs are designed and tested for applica-  
tions requiring extended endurance. Inherent data re-  
tention is greater than 100 years.  
DATA Polling  
—Toggle Bit  
High Reliability  
—Endurance: 100,000 Cycles  
—Data Retention: 100 Years  
JEDEC Approved Byte-Wide Pinout  
PIN CONFIGURATION  
LCC  
PLCC  
PLASTIC DIP  
CERDIP  
FLAT PACK  
SOIC  
TSOP  
A
A
A
I/O  
I/O  
I/O  
1
2
3
4
5
6
7
8
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
A
A
A
A
A
A
NC  
NC  
V
NC  
WE  
NC  
A
A
A
NC  
1
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
V
2
1
0
0
1
2
3
4
5
6
7
12  
CC  
4
3
2
1
32 31 30  
29  
A
2
WE  
12  
A
A
A
A
A
A
A
5
6
7
8
9
A
A
A
6
5
4
3
2
1
0
8
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
3
NC  
28  
27  
26  
25  
24  
23  
22  
21  
9
4
A
8
A
9
11  
5
NC  
NC  
OE  
A
V
SS  
NC  
6
A
11  
X28C64  
9
X28C64  
CC  
7
OE  
I/O  
10  
11  
12  
13  
14  
15  
16  
3
4
5
6
7
X28C64  
10  
11  
12  
13  
I/O  
I/O  
I/O  
I/O  
10  
8
A
10  
CE  
I/O  
9
CE  
8
9
11  
NC  
I/O  
7
10  
11  
12  
13  
14  
I/O  
7
I/O  
6
I/O  
5
I/0  
4
I/O  
CE  
0
6
I/O  
0
1
2
14 15 16 17 18 19 20  
A
OE  
10  
I/O  
I/O  
V
I/O  
3
SS  
3853 ILL F23.1  
3853 FHD F03  
3853 FHD F02  
© Xicor, Inc. 1991, 1995 Patents Pending  
3853-2.7 4/2/96 T0/C3/D2 NS  
Characteristics subject to change without notice  
1