X28C256
WRITE CYCLE LIMITS
(9)
Min.
(6)
Typ.
Symbol
Parameter
Max.
Units
(7)
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
Write Cycle Time
Address Setup Time
Address Hold Time
Write Setup Time
Write Hold Time
CE Pulse Width
OE HIGH Setup Time
OE HIGH Hold Time
WE Pulse Width
WE HIGH Recovery
SDP WE Recovery
Data Valid
5
10
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
µs
ns
ns
µs
WC
AS
0
150
0
AH
CS
0
CH
100
10
10
100
50
1
CW
OES
OEH
WP
WPH
WPH2
DV
(8)
1
Data Setup
50
10
10
1
DS
Data Hold
DH
Delay to Next Write
Byte Load Cycle
DW
(9)
100
µs
BLC
3855 PGM T11.1
WE Controlled Write Cycle
t
WC
ADDRESS
t
t
AS
AH
t
t
CS
CH
CE
OE
t
t
OES
t
OEH
t
WP
WE
DV
DATA IN
DATA OUT
DATA VALID
t
t
DS
DH
HIGH Z
3855 FHD F06
Notes: (6) Typical values are for T = 25°C and nominal supply voltage.
A
(7) t
is the minimum cycle time to be allowed from the system perspective unless polling techniques are used. It is the maximum
WC
time the device requires to automatically complete the internal write operation.
(8) t is the normal page write operation WE recovery time. t is the WE recovery time needed only after the end of issuing
WPH
WPH2
the three-byte SDP command sequence and before writing the first byte of data to the array. Refer to Figure 6 which illustrates
the t requirement.
WPH2
(9) For faster t
and t
, refer to X28HC256 or X28VC256.
BLC
WC
13