X25F064/032/016/008
Operational Notes
Data Protection
The device powers-up in the following state:
• The device is in the low power standby state.
The following circuitry has been included to prevent
inadvertent programming:
• The program enable latch is reset upon power-up.
• A HIGH to LOW transition on CS is required to
enter an active state and receive an instruction.
• A program enable instruction must be issued to set
the program enable latch.
• SO pin is high impedance.
• CS must come HIGH at the proper clock count in
order to start a program cycle.
• The program enable latch is reset.
Figure 1. Read SerialFlash Memory Array Operation Sequence
CS
0
1
2
3
4
5
6
7
8
9
10
20 21 22 23 24 25 26 27 28 29 30
SCK
SI
INSTRUCTION
16 BIT ADDRESS
15 14 13
3
2
1
0
DATA OUT
HIGH IMPEDANCE
7
6
5
4
3
2
1
0
SO
MSB
6685 ILL F03
Figure 2. Read Status Register Operation Sequence
CS
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14
SCK
SI
INSTRUCTION
DATA OUT
HIGH IMPEDANCE
7
6
5
4
3
2
1
0
SO
MSB
6685 ILL F04
5