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X25F008 参数 Datasheet PDF下载

X25F008图片预览
型号: X25F008
PDF下载: 下载PDF文件 查看货源
内容描述: SerialFlash⑩存储器,有块LockTM保护 [SerialFlash⑩ Memory With Block LockTM Protection]
分类和应用: 存储
文件页数/大小: 16 页 / 73 K
品牌: XICOR [ XICOR INC. ]
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X25F064/032/016/008  
PIN DESCRIPTIONS  
Serial Output (SO)  
Hold (HOLD)  
HOLD isusedinconjunctionwiththeCSpintoselectthe  
device. Once the part is selected and a serial sequence  
is underway, HOLD may be used to pause the serial  
communication with the controller without resetting the  
serial sequence. To pause, HOLD must be brought  
LOW while SCK is LOW. To resume communication,  
HOLD is brought HIGH, again while SCK is LOW. If the  
pause feature is not used, HOLD should be held HIGH  
at all times.  
SO is a push-pull serial data output pin. During a read  
cycle, data is shifted out on this pin. Data is clocked out  
by the falling edge of the serial clock.  
Serial Input (SI)  
SI is the serial data input pin. All opcodes, byte  
addresses, and data to be written to the memory are  
input on this pin. Data is latched by the rising edge of the  
serial clock.  
PIN CONFIGURATION  
Serial Clock (SCK)  
The Serial Clock controls the serial bus timing for data  
input and output. Opcodes, addresses, or data present  
on the SI pin are latched on the rising edge of the clock  
input, while data on the SO pin change after the falling  
edge of the clock input.  
8-Lead DIP/SOIC  
CS  
SO  
PP  
1
2
3
4
8
7
6
5
V
CC  
X25F064/  
032/016/  
008  
HOLD  
SCK  
SI  
V
SS  
Chip Select (CS)  
14-Lead TSSOP  
20-Lead TSSOP  
When CS is HIGH, the X25F064/032/016/008 is  
deselected and the SO output pin is at high impedance  
and unless an internal program operation is underway  
the X25F064/032/016/008 will be in the standby power  
mode. CS LOW enables the X25F064/032/016/008,  
placing it in the active power mode. It should be noted  
that after power-up, a HIGH to LOW transition on CS is  
required prior to the start of any operation.  
CS  
SO  
NC  
NC  
NC  
PP  
NC  
1
2
3
4
5
6
7
1
2
3
4
5
6
7
8
9
10  
14  
13  
12  
11  
10  
9
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
V
NC  
V
CC  
CS  
NC  
SO  
NC  
NC  
PP  
HOLD  
NC  
CC  
NC  
X25F032/  
016/008  
NC  
HOLD  
NC  
NC  
X25F064  
SCK  
SI  
NC  
V
8
SCK  
SI  
SS  
V
SS  
NC  
NC  
NC  
NC  
Program Protect (PP)  
6685 ILL F02.4  
When PP is LOW and the nonvolatile bit PPEN is “1”,  
nonvolatile programming of the X25F064/032/016/008  
status register is disabled, but the part otherwise func-  
tions normally. When PP is held HIGH, all functions,  
including nonvolatile programming operate normally.  
PP going LOW while CS is still LOW will interrupt  
programmingoftheX25F064/032/016/008statusregis-  
ter. If the internal program cycle has already been  
initiated, PP going LOW will have no effect on program-  
ming.  
PIN NAMES  
SYMBOL  
DESCRIPTION  
CS  
Chip Select Input  
Serial Output  
SO  
SI  
Serial Input  
SCK  
PP  
VSS  
VCC  
HOLD  
NC  
Serial Clock Input  
The PP pin function is blocked when the PPEN bit in  
thestatusregisteris0”.Thisallowstheusertoinstallthe  
X25F064/032/016/008 into a system with PP pin  
groundedandstillbeabletoprogramthestatusregister.  
The PP pin functions will be enabled when the PPEN bit  
is set “0”.  
Program Protect Input  
Ground  
Supply Voltage  
Hold Input  
No Connect  
6685 PGM T01.1  
2
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