X24164
Page Write
The X24164 is capable of a sixteen byte page write
operation. It is initiated in the same manner as the byte
write operation, but instead of terminating the write cycle
after the first data word is transferred, the master can
transmit up to fifteen more words. After the receipt of each
word, the X24164 will respond with an acknowledge.
After the receipt of each word, the four low order address
bits are internally incremented by one. The high order
seven bits of the word address remain constant. If the
master should transmit more than sixteen words prior to
generating the stop condition, the address counter will
“roll over” and the previously written data will be over-
written. As with the byte write operation, all inputs are
disabled until completion of the internal write cycle.
Refer to Figure 6 for the address, acknowledge and data
transfer sequence.
Acknowledge Polling
The disabling of the inputs can be used to take advan-
tage of the typical 5 ms write cycle time. Once the stop
condition is issued to indicate the end of the host’s write
operation the X24164 initiates the internal write cycle.
ACK polling can be initiated immediately. This involves
issuing the start condition followed by the slave address
for a
write operation.
If the X24164 is still busy with the
write operation no ACK will be returned. If the X24164
has completed the
write operation
an ACK will be
returned and the host can then proceed with the next
read or write operation. Refer to Flow 1.
Flow 1. ACK Polling Sequence
WRITE OPERATION
COMPLETED
ENTER ACK POLLING
ISSUE
START
ISSUE SLAVE
ADDRESS AND R/W = 0
ISSUE STOP
ACK
RETURNED?
YES
NEXT
OPERATION
A WRITE?
YES
ISSUE BYTE
ADDRESS
NO
NO
ISSUE STOP
PROCEED
PROCEED
3846 FHD F12
Figure 6. Page Write
S
T
BUS ACTIVITY:
A
R
MASTER
T
SDA LINE
BUS ACTIVITY:
X24164
S
A
C
K
A
C
K
A
C
K
A
C
K
A
C
K
SLAVE
ADDRESS
WORD ADDRESS (n)
DATA n
DATA n+1
DATA n+15
S
T
O
P
P
NOTE: In this example n = xxxx 0000 (B); x = 1 or 0
3846 FHD F13
6
XICOR [ XICOR INC. ]
