X24042
WRITE CYCLE LIMITS
(5)
Typ.
Symbol
Parameter
Min.
Max.
Units
(6)
t
Write Cycle Time
5
10
ms
WR
3849 PGM T09
The write cycle time is the time from a valid stop
condition of a write sequence to the end of the internal
erase/programcycle.Duringthewritecycle,theX24042
bus interface circuits are disabled, SDA is allowed to
remainhigh,andthedevicedoesnotrespondtoitsslave
address.
Write Cycle Timing
SCL
ACK
SDA
8th BIT
WORD n
t
WR
STOP
CONDITION
START
CONDITION
X24042
ADDRESS
3849 FHD F05
Notes: (5) Typical values are for T = 25°C and nominal supply voltage (5V).
A
(6) t
is the minimum cycle time from the system perspective when polling techniques are not used. It is the maximum time the
WR
device requires to perform the internal write operation.
Guidelines for Calculating Typical Values of Bus
Pull-Up Resistors
SYMBOL TABLE
WAVEFORM
INPUTS
OUTPUTS
120
V
Must be
steady
Will be
steady
CC MAX
R
=
=1.8KΩ
MIN
I
100
80
OL MIN
MAX
t
R
May change
from Low to
High
Will change
from Low to
High
R
=
MAX
C
BUS
MAX.
60
40
20
0
RESISTANCE
May change
from High to
Low
Will change
from High to
Low
MIN.
Don’t Care:
Changes
Allowed
Changing:
State Not
Known
RESISTANCE
20 40 60 80
120
100
0
Center Line
is High
Impedance
BUS CAPACITANCE (pF)
N/A
3849 FHD F17
11
XICOR [ XICOR INC. ]
