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X24026Y 参数 Datasheet PDF下载

X24026Y图片预览
型号: X24026Y
PDF下载: 下载PDF文件 查看货源
内容描述: 串行E2PROM [Serial E2PROM]
分类和应用: 存储内存集成电路可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟
文件页数/大小: 15 页 / 67 K
品牌: XICOR [ XICOR INC. ]
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X24026  
Page Write  
Flow 1. ACK Polling Sequence  
The X24026 is capable of a four byte page write opera-  
tion. It is initiated in the same manner as the byte write  
operation, but instead of terminating the write cycle after  
the first data word is transferred, the master can transmit  
up to three more words. After the receipt of each word,  
the X24026 will respond with an acknowledge.  
WRITE OPERATION  
COMPLETED  
ENTER ACK POLLING  
ISSUE  
START  
After the receipt of each word, the two low order address  
bits are internally incremented by one. The high order six  
bits of the address remain constant. If the master should  
transmit more than four words prior to generating the  
stop condition, the address counter will “roll over” and the  
previously written data will be overwritten. As with the  
byte write operation, all inputs are disabled until comple-  
tion of the internal write cycle. Refer to Figure 6 for the  
address, acknowledge and data transfer sequence.  
ISSUE SLAVE_  
ADDRESS AND R/W = 0  
ISSUE STOP  
ACK  
NO  
RETURNED?  
Acknowledge Polling  
The disabling of the inputs, during the internal write oper-  
ation, can be used to take advantage of the typical 5 ms  
write cycle time. Once the stop condition is issued to indi-  
cate the end of the host’s write operation the X24026 ini-  
tiates the internal write cycle. ACK polling can be initiated  
immediately. This involves issuing the start condition fol-  
lowed by the slave address for a write operation. If the  
X24026 is still busy with the write operation no ACK will  
be returned. If the X24026 has completed the write oper-  
ation an ACK will be returned and the master can then  
proceed with the next read or write operation.  
YES  
NEXT  
OPERATION  
A WRITE?  
NO  
YES  
ISSUE BYTE  
ADDRESS  
ISSUE STOP  
PROCEED  
READ OPERATIONS  
PROCEED  
Read operations are initiated in the same manner as  
write operations with the exception that the R/W bit of the  
slave address is set to a one. There are three basic read  
operations: current address read, random read and  
sequential read.  
7020 FRM 09  
It should be noted that the ninth clock cycle of the read  
operation is not a “don’t care.” To terminate a read opera-  
tion, the master must either issue a stop condition during  
the ninth cycle or hold SDA HIGH during the ninth clock  
cycle and then issue a stop condition.  
6