1K Bit
X22C12
Nonvolatile Static RAM
DESCRIPTION
256 x 4
FEATURES
• High Performance CMOS
—150ns RAM Access Time
• High Reliability
—Store Cycles: 1,000,000
—Data Retention: 100 Years
• Low Power Consumption
—Active: 40mA Max.
—Standby: 100µA Max.
• Infinite Array Recall, RAM Read and Write Cycles
• Nonvolatile Store Inhibit: V
CC
= 3.5V Typical
• Fully TTL and CMOS Compatible
• JEDEC Standard 18-Pin 300-mil DIP
• 100% Compatible with X2212
—With Timing Enhancements
FUNCTIONAL DIAGRAM
NONVOLATILE E
2
PROM
MEMORY ARRAY
A
0
A
1
A
2
A
3
A
4
P
e
STORE
ARRAY
RECALL
STATIC RAM
MEMORY ARRAY
V
CC
COLUMN
I/O CIRCUITS
V
SS
COLUMN SELECT
A
7
A
6
A
5
ro
Xicor NOVRAMs are designed for unlimited write oper-
ations to the RAM, either RECALLs from E
2
PROM or
writes from the host. The X22C12 will reliably endure
1,000,000 STORE cycles. Inherent data retention is
greater than 100 years.
du
A
7
A
4
A
3
A
2
A
1
A
0
CS
V
SS
STORE
1
2
3
4
5
6
7
8
9
A
7
A
4
A
3
A
2
A
1
A
0
CS
V
SS
STORE
RECALL
1
2
3
4
5
6
7
8
9
10
The X22C12 is a 256 x 4 CMOS NOVRAM featuring a
high-speed static RAM overlaid bit-for-bit with a non-
volatile E
2
PROM. The NOVRAM design allows data to
be easily transferred from RAM to E
2
PROM (STORE)
and from E
2
PROM to RAM (RECALL). The STORE
operation is completed within 5ms or less and the
RECALL is completed within 1µs.
PIN CONFIGURATION
PLASTIC DIP
CERDIP
18
17
16
15
X22C12 14
13
12
11
10
V
CC
A
6
A
5
I/O
4
I/O
3
I/O
2
I/O
1
WE
RECALL
ROW
SELECT
STORE
RECALL
I/O
1
I/O
2
I/O
3
I/O
4
bs
ol
CONTROL
LOGIC
et
INPUT
DATA
CONTROL
O
CS
WE
REV 1.0 1/30/01
www.xicor.com
Characteristics subject to change without notice.
ct
SOIC
20
19
18
17
X22C12 16
15
14
13
12
11
V
CC
A
6
A
5
I/O
4
NC
NC
I/O
3
I/O
2
I/O
1
WE
1 of 12
XICOR [ XICOR INC. ]
