X20C04
PIN DESCRIPTIONS
Addresses (A
0
–A
8
)
The Address inputs select an 8-bit memory location
during a read or write operation.
Chip Enable (CE)
The Chip Enable input must be LOW to enable all read/
write operations. When
CE
is HIGH, power consumption
is reduced.
Output Enable (OE)
The Output Enable input controls the data output buffers
and is used to initiate read and recall operations. Output
Enable LOW disables a store operation regardless of
the state of
CE, WE,
or
NE.
Data In/Data Out (I/O
0
–I/O
7
)
Data is written to or read from the X20C04 through the
I/O pins. The I/O pins are placed in the high impedance
state when either
CE
or
OE
is HIGH or when
NE
is LOW.
Write Enable (WE)
The Write Enable input controls the writing of data to
both the static RAM and stores to the E
2
PROM.
Nonvolatile Enable (NE)
The Nonvolatile Enable input controls all accesses to
the E
2
PROM array (store and recall functions).
PIN NAMES
Symbol
A
0
–A
8
I/O
0
–I/O
7
WE
CE
OE
NE
V
CC
V
SS
NC
Description
Address Inputs
Data Input/Output
Write Enable
Chip Enable
Output Enable
Nonvolatile Enable
+5V
Ground
No Connect
3825 PGM T01
FUNCTIONAL DIAGRAM
VCC SENSE
EEPROM ARRAY
A3–A6
ROW
SELECT
CE
OE
WE
NE
A0–A2
A7–A8
COLUMN
SELECT
&
I/OS
CONTROL
LOGIC
I/O0–I/O7
ST
O
R
E
512 x 8
SRAM
ARRAY
R
EC
AL
L
3825 FHD F01
2
XICOR [ XICOR INC. ]
