X28C512/X28C513
WRITE CYCLE LIMITS
Symbol
Parameter
Min.
Max.
Units
(4)
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
Write Cycle Time
Address Setup Time
Address Hold Time
Write Setup Time
Write Hold Time
CE Pulse Width
OE HIGH Setup Time
OE HIGH Hold Time
WE Pulse Width
WE HIGH Recovery
Data Valid
10
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
ns
ns
µs
µs
WC
AS
0
50
0
AH
CS
0
CH
100
10
10
100
100
CW
OES
OEH
WP
WPH
DV
1
Data Setup
50
0
DS
Data Hold
DH
Delay to Next Write
Byte Load Cycle
10
0.2
DW
BLC
100
3856 PGM T10.2
WE Controlled Write Cycle
t
WC
ADDRESS
t
t
AH
AS
t
t
CS
CH
CE
OE
t
t
OEH
OES
t
WP
WE
t
DV
DATA IN
DATA OUT
DATA VALID
DS
t
t
DH
HIGH Z
3856 FHD F17
Notes: (4) t
is the minimum cycle time to be allowed from the system perspective unless polling techniques are used. It is the maximum time
WC
the device requires to complete the internal write operation.
13
XICOR [ XICOR INC. ]
