Production Data
WM9715L
Note that at low DCVDD voltages, the output range of the AUXDAC becomes limited, so that its
maximum RMS output voltage is the lesser of:
(DCVDD-0.7) / √2 Vrms
or AVDD / 3.3 Vrms
Under these circumstances, the AUXDAC cannot convert high digital input values to the correct
analogue equivalent; its digital input range must therefore be limited accordingly. If necessary, this
limitation can be circumvented by setting gains for the AUXDAC signal in register 12h, or by using a
higher DCVDD voltage.
PD Rev 4.0 December 2007
29
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