WM8985
Pre-Production
Right DAC output to right output
R51 (33h)
0
1
DACR2RMIX
BYPR2RMIX
1
0
mixer
Right channel
output mixer
control
0 = not selected
1 = selected
Right bypass path (from the right
channel input PGA stage) to right
output mixer
0 = not selected
1 = selected
4:2
BYPRMIXVOL
000
Right bypass volume control to
output channel mixer:
000 = -15dB
001 = -12dB
010 = -9dB
011 = -6dB
100 = -3dB
101 = 0dB
110 = +3dB
111 = +6dB
5
AUXR2RMIX
0
Right Auxiliary input to right channel
output mixer:
0 = not selected
1 = selected
8:6
AUXRMIXVOL
000
Aux right channel input to right mixer
volume control:
000 = -15dB
001 = -12dB
010 = -9dB
011 = -6dB
100 = -3dB
101 = 0dB
110 = +3dB
111 = +6dB
R3 (03h)
2
3
LMIXEN
RMIXEN
0
0
Left output channel mixer enable:
0 = disabled
Power
management
3
1= enabled
Right output channel mixer enable:
0 = disabled
1 = enabled
Table 33 Left and Right Output Mixer Control
HEADPHONE OUTPUTS (LOUT1 AND ROUT1)
The headphone outputs LOUT1 and ROUT1 can drive a 16Ω or 32Ω headphone load, either through
DC blocking capacitors, or DC-coupled to a buffered midrail reference (LOUT2 or ROUT2), saving a
capacitor (capless mode). When using capless mode AVDD1 and AVDD2 should use the same
supply to maximise supply rejection. OUT3 and OUT4 should not be used as a buffered midrail
reference in capless mode.
PP, Rev 3.4, October 2006
64
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
