Pre-Production
WM8985
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R45 (20h)
5:0
INPPGAVOLL
010000
(0dB)
Left channel input PGA volume
Left channel
input PGA
volume
000000 = -12dB
000001 = -11.25db
.
control
010000 = 0dB
.
111111 = +35.25dB
6
7
INPPGAMUTEL
INPPGAZCL
0
0
Mute control for left channel input PGA:
0 = Input PGA not muted, normal
operation
1 = Input PGA muted (and disconnected
from the following input BOOST stage).
Left channel input PGA zero cross
enable:
0 = Update gain when gain register
changes
1 = Update gain on 1st zero cross after
gain register write.
8
INPPGAVU
Not
latched
INPPGA left and INPPGA right volume
do not update until a 1 is written to
INPPGAVU (in reg 45 or 46)
(See "Volume Updates" below)
R46 (2Eh)
5:0
INPPGAVOLR
010000
(0dB)
Right channel input PGA volume
Right
000000 = -12dB
channel
input PGA
volume
control
000001 = -11.25db
.
010000 = 0dB
.
111111 = +35.25dB
6
7
INPPGAMUTER
INPPGAZCR
0
0
Mute control for right channel input
PGA:
0 = Input PGA not muted, normal
operation
1 = Input PGA muted (and disconnected
from the following input BOOST stage).
Right channel input PGA zero cross
enable:
0 = Update gain when gain register
changes
1 = Update gain on 1st zero cross after
gain register write.
8
INPPGAVU
ALCSEL
Not
latched
INPPGA left and INPPGA right volume
do not update until a 1 is written to
INPPGAVU (in reg 45 or 46)
(See "Volume Updates" below)
ALC function select:
00 = ALC off
R32 (20h)
8:7
00
ALC control
1
01 = ALC right only
10 = ALC left only
11 = ALC both on
Table 7 Input PGA Volume Control
PP, Rev 3.4, October 2006
31
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
