WM8961
Pre-Production
Test Conditions
MICVDD = 2.5V, DVDD = 1.8V, CPVDD=1.8V, AVDD = 1.8V SPKVDD1 = SPKVDD2 = 5V, TA = +25oC, 1kHz signal, fs = 48kHz,
PGA gain = 0dB, 24-bit audio data unless otherwise stated.
PARAMETER
VPOS capacitor
VNEG capacitor
Charge pump start-up time
Digital Input / Output
Input HIGH Level
Input LOW Level
Output HIGH Level
Output LOW Level
Input capacitance
Input leakage
SYMBOL
TEST CONDITIONS
at 2V
at 2V
MIN
TYP
MAX
UNIT
2
2
μF
μF
μs
300
VIH
VIL
0.7×DVDD
0.9×DVDD
V
V
0.3×DVDD
0.1×DVDD
0.9
VOH
VOL
IOL=1mA
V
IOH=-3mA
V
10
pF
μA
-0.9
CURRENT CONSUMPTION
AVDD
IAVDD
IDVDD
OFF: device powered
down using register
writes, TSENSEN=0, all
clocks stopped.
5
3
5
1
1
20
20
20
10
20
μA
μA
μA
μA
μA
DVDD
CPVDD
ICPVDD
ISPKVDD
IMICVDD
SPKVDD
MICVDD
Note:
1. The measurement was made with HPL_VOL//HPR_VOL = 0dB. Normally, the recommended setting for SNR optimised HP
playback mode (see “SNR optimised Mode”) includes -7dB HPL_VOL//HPR_VOL setting, to give a further noise floor
improvement.
PP, August 2009, Rev 3.1
w
11
WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
