Pre-Production
WM8959
ABSOLUTE MAXIMUM RATINGS
Absolute Maximum Ratings are stress ratings only. Permanent damage to the device may be caused by continuously
operating at or beyond these limits. Device functional operating limits and guaranteed performance specifications are given
under Electrical Characteristics at the test conditions specified.
ESD Sensitive Device. This device is manufactured on a CMOS process. It is therefore generically susceptible
to damage from excessive static voltages. Proper ESD precautions must be taken during handling and storage
of this device.
Wolfson tests its package types according to IPC/JEDEC J-STD-020B for Moisture Sensitivity to determine acceptable storage
conditions prior to surface mount assembly. These levels are:
MSL1 = unlimited floor life at <30°C / 85% Relative Humidity. Not normally stored in moisture barrier bag.
MSL2 = out of bag storage for 1 year at <30°C / 60% Relative Humidity. Supplied in moisture barrier bag.
MSL3 = out of bag storage for 168 hours at <30°C / 60% Relative Humidity. Supplied in moisture barrier bag.
The Moisture Sensitivity Level for each package type is specified in Ordering Information.
CONDITION
Supply voltages (excluding SPKVDD)
MIN
-0.3V
MAX
+4.5V
SPKVDD
-0.3V
+7V
Voltage range digital inputs
Voltage range analogue inputs
Operating temperature range, TA
Junction temperature, TJMAX
Storage temperature after soldering
DGND -0.3V
AGND -0.3V
-40ºC
DBVDD +0.3V
AVDD +0.3V
+85ºC
-40ºC
+150ºC
-65ºC
+150ºC
RECOMMENDED OPERATING CONDITIONS
PARAMETER
Digital supply range (Core)
Digital supply range (Buffer)
Analogue supplies range
Speaker supply range
Ground
SYMBOL
DCVDD
MIN
1.71
1.71
2.7
TYP
MAX
3.6
UNIT
V
V
V
V
V
DBVDD
3.6
AVDD, HPVDD
SPKVDD
3.6
2.7
5.5
DGND, AGND, HPGND,
SPKGND
0
Notes:
1. Analogue, digital and speaker grounds must always be within 0.3V of each other.
2. All digital and analogue supplies are completely independent from each other (i.e. not internally connected).
3. DCVDD must be less than or equal to AVDD.
4. DCVDD must be less than or equal to DBVDD.
5. AVDD must be less than or equal to SPKVDD.
6. SPKVDD must be high enough to support the peak output voltage when using DCGAIN and ACGAIN functions, to
avoid output waveform clipping. Peak output voltage is AVDD*(DCGAIN+ACGAIN)/2.
7. HPVDD must be equal to AVDD
PP, May 2008, Rev 3.1
7
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
