WM8956
Production Data
Test Conditions
DCVDD = 1.8V, DBVDD = 3.3V, AVDD = SPKVDD1 = SPKVDD2 = 3.3V, TA = +25oC, 1kHz signal, fs = 48kHz, PGA gain = 0dB,
24-bit audio data unless otherwise stated.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
-78
MAX
UNIT
dB
Total Harmonic Distortion Plus
Noise
THD+N
P
O =200mW, RL = 8,
SPKVDD1=SPKVDD2
0.013
%
(LINPUT3 and RINPUT3 to
speaker outputs)
=3.3V; AVDD=3.3V
PO =320mW, RL = 8,
SPKVDD1=SPKVDD2
-72
dB
%
0.025
=3.3V; AVDD=3.3V
PO =500mW, RL = 8,
SPKVDD1=SPKVDD2
-75
dB
%
0.018
=5V; AVDD=3.3V
PO =1W, RL = 8,
SPKVDD1=SPKVDD2
-70
dB
%
0.032
=5V; AVDD=3.3V
Signal to Noise Ratio
(A-weighted)
SNR
SNR
SPKVDD1=SPKVDD2
=3.3V; AVDD=3.3V;
RL = 8, ref=2.0Vrms
SPKVDD1=SPKVDD2
=5V; AVDD=3.3V;
RL = 8, ref=2.8Vrms
SPKVDD1=SPKVDD2
=3.3V; AVDD=3.3V;
RL = 8, ref=2.0Vrms
SPKVDD1=SPKVDD2
=5V; AVDD=3.3V;
RL = 8, ref=2.8Vrms
SPKVDD1=SPKVDD2
=5V;
90
92
90
92
1
dB
dB
dB
dB
uA
(DAC to speaker outputs)
Signal to Noise Ratio
(A-weighted)
(LINNPUT3 and RINPUT3 to
speaker outputs)
Speaker Supply Leakage current
ISPKVDD
All other supplies
disconnected
SPKVDD1=SPKVDD2
=5V;
1
uA
All other supplies 0V
DAC to speaker playback
Power Supply Rejection Ratio
(100mV ripple on
SPKVDD1/SPKVDD2 @217Hz)
PSRR
80
80
dB
dB
L/RINPUT3 to speaker
playback
Analogue Reference Levels
Midrail Reference Voltage
Microphone Bias
VMID
–3%
–5%
–5%
AVDD/2
0.9AVDD
0.65AVDD
+3%
+ 5%
+ 5%
3
V
V
V
Bias Voltage
VMICBIAS
3mA load current
MBSEL=1
3mA load current
MBSEL=0
Bias Current Source
Output Noise Voltage
Digital Input / Output
Input HIGH Level
Input LOW Level
IMICBIAS
Vn
mA
1K to 20kHz
15
nV/Hz
VIH
VIL
0.7DBVDD
0.9DBVDD
V
V
0.3DBVDD
0.1DBVDD
0.9
Output HIGH Level
Output LOW Level
Input capacitance
Input leakage
VOH
VOL
IOL=1mA
V
IOH=-1mA
V
10
pF
uA
-0.9
PD, November 2011, Rev 4.1
8
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