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WM8955 参数 Datasheet PDF下载

WM8955图片预览
型号: WM8955
PDF下载: 下载PDF文件 查看货源
内容描述: 立体声DAC便携式音频应用 [STEREO DAC FOR PORTABLE AUDIO APPLICATIONS]
分类和应用: 便携式
文件页数/大小: 43 页 / 377 K
品牌: WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
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WM8955L  
Product Preview  
STOPPING THE MASTER CLOCK  
In order to minimise power consumed in the digital core of the WM8955L, the master clock should be  
stopped in Standbyand OFF modes. If this is cannot be done externallyat the clock source, the  
DIGENB bit (R25, bit 0) can be set to stop the MCLK signal from propagating into the device core.  
However, since setting DIGENB has no effect on the power consumption of other system  
components external to the WM8955L, it is preferable to disable the master clock at its source  
wherever possible.  
REGISTER  
ADDRESS  
BIT  
LABEL  
DEFAULT  
DESCRIPTION  
R25 (19h)  
1
DIGENB  
0
Master clock disable  
Additional Control  
(1)  
0: master clock enabled  
1: master clock disabled  
Table 2 ADC andDAC Oversampling Rate Selection  
NOTE: Before DIGENB can be set, the control bits DACL andDACR must be set to zero anda  
waiting time of 1ms must be observed. Any failure to follow this procedure may prevent DACs  
andADCs from re-starting correctly.  
OVERSAMPLING RATE  
Bydefault, the oversampling rate of the DAC digital filters is 128x. However, this can be changed to  
64x bywriting to the DACOSR bit. In the 64x oversampling mode, the digital filters consumes less  
power. However, the signal-to-noise ratio is slightlyreduced.  
REGISTER  
ADDRESS  
BIT  
LABEL  
DEFAULT  
DESCRIPTION  
0
DACOSR  
0
DAC oversample rate select  
1 = 64x (lowest power)  
0 = 128x (best SNR)  
Table 27 Oversampling Rate Selection  
SAVING POWER AT LOW SUPPLY VOLTAGES  
The analogue supplies to the WM8955L can run from 1.8V to 3.6V. Bydefault, all analogue circuitry  
on the device is optimized to run at 3.3V. This set-up is also good for all other supplyvoltages down  
to 1.8V. However, at lower voltages, it is possible to save power byreducing the internal bias  
currents used in the analogue circuitry. This is controlled as shown below.  
REGISTER  
ADDRESS  
BIT  
LABEL  
DEFAULT  
DESCRIPTION  
R23 (17h)  
7:6  
VSEL[1:0]  
11  
Analogue Bias optimization  
Additional  
Control(1)  
00 : Lowest bias current, optimized for 1.8V  
01 : Low bias current, optimized for 2.5V  
10, 11 : Default bias current, optimized for 3.3V  
Table 28 Analogue Bias Selection  
Product Preview Rev 0.4 May2003  
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