WM8955BL
Production Data
PIN DESCRIPTION
PIN NO
NAME
MCLK
TYPE
Digital Input
Supply
DESCRIPTION
Master Clock
1
2
3
4
5
6
7
8
Digital Core Supply
Digital Buffer (I/O) Supply
DCVDD
DBVDD
DGND
Supply
Supply
Digital Ground (return path for both DCVDD and DBVDD)
Audio Interface Bit Clock
Digital Input / Output
Digital Input
Digital Input / Output
Supply
BCLK
DAC Digital Audio Data
DACDAT
DACLRC
PLLGND
Audio Interface Left / Right Clock
Internally connected to AGND. Connect this pin to AGND externally
for best PLL performance, or leave floating.
Analogue Output
Analogue Output
Analogue Output
Analogue Output
Supply
Mono Output
9
MONOOUT
OUT3
Output 3 (can be used as Headphone Pseudo Ground)
Right Output 1 (Line or Headphone)
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
ROUT1
LOUT1
HPGND
ROUT2
LOUT2
HPVDD
AVDD
Left Output 1 (Line or Headphone)
Supply for Analogue Output Drivers (LOUT1/2, ROUT1/2)
Right Output 2 (Line or Headphone or Earpiece)
Left Output 2 (Line or Headphone or Earpiece)
Supply for Analogue Output Drivers (LOUT1/2, ROUT1/2, MONOUT)
Analogue Supply
Analogue Output
Analogue Output
Supply
Supply
Supply
Analogue Ground (return path for AVDD)
Reference Voltage Decoupling Capacitor
Midrail Voltage Decoupling Capacitor
AGND
Analogue Output
Analogue Output
Analogue Input
Analogue Input
Analogue Input
Analogue Input
Digital Input
VREF
VMID
Negative end of MONOIN+, for differential mono signals
Analogue Line-in to mixers (mono channel)
Analogue Line-in to mixers (right channel)
Analogue Line-in to mixers (left channel)
Control Interface Selection
MONOIN-
MONOIN+
LINEINR
LINEINL
MODE
CSB
Digital Input
Chip Select / Device Address Selection
Control Interface Data Input / 2-wire Acknowledge output
Control Interface Clock Input
Digital Input/Output
Digital Input
SDIN
SCLK
PD Rev 4.1 February 2007
4
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