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WM8945 参数 Datasheet PDF下载

WM8945图片预览
型号: WM8945
PDF下载: 下载PDF文件 查看货源
内容描述: 单声道低功耗编解码器与视频缓冲器和触摸屏控制器 [Mono Low-Power CODEC with Video Buffer and Touch Panel Controller]
分类和应用: 解码器编解码器控制器
文件页数/大小: 169 页 / 1604 K
品牌: WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
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Production Data  
WM8945  
REGISTER  
ADDRESS  
BIT  
LABEL  
DEFAULT  
DESCRIPTION  
IM_TCHPD_INT  
Interrupt mask for Touch Panel Pen  
Down status  
9
0
0 = Not masked  
1 = Masked  
IM_AUXADC_  
INT  
Interrupt mask for AUXADC Data  
Ready status  
8
0
0
0
0 = Not masked  
1 = Masked  
IM_LDO_UV_  
INT  
Interrupt mask for LDO  
Undervoltage status  
0 = Not masked  
1 = Masked  
Table 64 Interrupt Control  
CONTROL INTERFACE  
The WM8945 is controlled by writing to its control registers. Readback is available for all registers.  
The Control Interface can operate as either a 2-, 3- or 4-wire interface:  
.
.
.
2-wire (I2C) mode uses pins SCLK and SDA  
3-wire (SPI) mode uses pins C¯¯S, SCLK and SDA  
4-wire (SPI) mode uses pins C¯¯S, SCLK, SDA and SDOUT  
Readback is provided on the bi-directional pin SDA in 2-/3-wire modes.  
The device address in 2-wire (I2C) mode is 34h.  
The WM8945 uses 15-bit register addresses and 16-bit data in all Control Interface modes.  
SELECTION OF CONTROL INTERFACE MODE  
The WM8945 Control Interface can be configured for I2C mode or SPI modes using the  
CIFMODE/GPIO3 pin at power-up. The mode selection is as described in Table 66.  
CIFMODE/GPIO3  
INTERFACE FORMAT  
2 wire  
Low  
High  
3- or 4- wire  
Table 65 Control Interface Mode Selection  
After the Control Interface Mode has been configured, the MODE_GPIO register bit should be set in  
order to latch the selection and to allow GPIO functions to be supported on the CIFMODE/GPIO3 pin.  
After the MODE_GPIO register bit has been set, the Control Interface mode selection will remain  
latched until a Software Reset or Power On Reset occurs. See “General Purpose Input / Output” for  
details.  
In 2-wire (I2C) Control Interface mode, Auto-Increment mode may be selected. This enables multiple  
write and multiple read operations to be scheduled faster than is possible with single register  
operations. The auto-increment option is enabled when the AUTO_INC register bit is set. This bit is  
defined in Table 66. Auto-increment is disabled by default.  
In SPI modes, 3-wire or 4-wire operation may be selected using the SPI_4WIRE register bit. In 3-wire  
mode, register readback is provided using the bi-directional pin SDA. In 4-wire mode, register  
readback is provided using SDOUT. The SDOUT pin may be configured as CMOS or as Open Drain  
using the SPI_OD bit. In 3-wire mode the SDA pin may be configured as CMOS or as Open Drain  
PD, May 2011, Rev 4.1  
97  
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