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WM8912GEFL/RV 参数 Datasheet PDF下载

WM8912GEFL/RV图片预览
型号: WM8912GEFL/RV
PDF下载: 下载PDF文件 查看货源
内容描述: 超低功耗DAC与耳机驱动器的便携式音频应用 [Ultra Low Power DAC with Headphone Driver for Portable Audio Applications]
分类和应用: 驱动器便携式
文件页数/大小: 128 页 / 1259 K
品牌: WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
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Production Data  
WM8912  
DEVICE DESCRIPTION  
INTRODUCTION  
The WM8912 is a high performance ultra-low power stereo DAC optimised for portable audio  
applications. Powerful digital signal processing (DSP) makes it ideal for small portable devices.  
Two stereo pairs of ground-referenced Class-W outputs are provided, suitable for driving a stereo  
headphone and stereo line load simultaneously. The ground-referenced outputs are powered from an  
integrated Charge Pump, enabling high quality, power efficient outputs without requirement for DC  
blocking capacitors. A DC Servo circuit is available for DC offset correction, thereby suppressing  
pops and further reducing power consumption. Ground loop feedback is provided on the headphone  
outputs and on the line outputs, providing rejection of noise on the ground connections. All outputs  
use Wolfson SilentSwitch™ technology for pop and click suppression.  
The stereo DACs are of hi-fi quality, using a 24-bit low-order oversampling architecture to deliver  
optimum performance. A flexible clocking arrangement supports all commonly used DAC sample  
rates, either directly from an external MCLK or with the use of the integrated Frequency Locked Loop  
(FLL) for additional flexibility. DAC soft mute and un-mute is available for pop-free music playback.  
The integrated Dynamic Range Controller (DRC) and ReTuneTM Mobile 5-band parametric equaliser  
(EQ) provide further processing capability of the digital audio paths. The DRC provides compression  
and signal level control to improve the handling of unpredictable signal levels. ‘Anti-clip’ and ‘quick  
release’ algorithms improve intelligibility in the presence of transients and impulsive noises. The EQ  
provides the capability to tailor the audio path according to the frequency characteristics of an  
earpiece or loudspeaker, and/or according to user preferences.  
The WM8912 has a highly flexible digital audio interface, supporting a number of protocols, including  
I2S, DSP, MSB-first left/right justified, and can operate in master or slave modes. PCM operation is  
supported in the DSP mode. A-law and μ-law companding are also supported. Time division  
multiplexing (TDM) is available to allow multiple devices to stream data simultaneously on the same  
bus, saving space and power.  
The system clock (SYSCLK) provides clocking for the DACs, DSP core, digital audio interface and  
other circuits. SYSCLK can be derived directly from the MCLK pin or via the integrated FLL,  
providing flexibility to support a wide range of clocking schemes. Typical portable system MCLK  
frequencies and commonly used sample rates from 8kHz to 48kHz are all supported. The clocking  
circuits are configured automatically from the sample rate and from the MCLK / SYSCLK ratio.  
The integrated FLL can be used to generate SYSCLK from a wide variety of different reference  
sources and frequencies. The FLL can accept a wide range of reference frequencies, which may be  
high frequency (e.g. 13MHz) or low frequency (eg. 32.768kHz). The FLL is tolerant of jitter and may  
be used to generate a stable SYSCLK from a less stable input signal. The integrated FLL can be  
used as a free-running oscillator, enabling autonomous clocking of the Headphone Charge Pump  
and DC Servo if required.  
The WM8912 uses a standard 2-wire control interface, providing full software control of all features,  
together with device register readback. An integrated Control Write Sequencer enables automatic  
scheduling of control sequences; commonly-used signal configurations may be selected using ready-  
programmed sequences, including time-optimised control of the WM8912 pop suppression features.  
It is an ideal partner for a wide range of industry standard microprocessors, controllers and DSPs.  
Unused circuitry can be disabled under software control, in order to save power; low leakage currents  
enable extended standby/off time in portable battery-powered applications.  
Two GPIO pins may be configured for miscellaneous input/output functions such as  
button/accessory detect inputs, or for clock, system status, or programmable logic level output for  
control of additional external circuitry. Interrupt logic, status readback and de-bouncing options are  
supported within this functionality.  
PD, Rev 4.0, September 2010  
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