Pre-Production
WM8904
AUDIO DATA FORMATS (NORMAL MODE)................................................................................................................ 92
AUDIO DATA FORMATS (TDM MODE)........................................................................................................................ 95
DIGITAL AUDIO INTERFACE CONTROL..................................................................... 97
AUDIO INTERFACE OUTPUT TRI-STATE................................................................................................................... 98
BCLK AND LRCLK CONTROL...................................................................................................................................... 98
COMPANDING .............................................................................................................................................................. 99
LOOPBACK ................................................................................................................................................................. 101
DIGITAL PULL-UP AND PULL-DOWN........................................................................................................................ 101
CLOCKING AND SAMPLE RATES............................................................................. 102
SYSCLK CONTROL .................................................................................................................................................... 103
CONTROL INTERFACE CLOCKING .......................................................................................................................... 104
CLOCKING CONFIGURATION ................................................................................................................................... 104
ADC / DAC CLOCK CONTROL................................................................................................................................... 105
OPCLK CONTROL ...................................................................................................................................................... 106
TOCLK CONTROL ...................................................................................................................................................... 106
ADC / DAC OPERATION AT 88.2K / 96K ................................................................................................................... 107
FREQUENCY LOCKED LOOP (FLL).......................................................................... 108
FREE-RUNNING FLL CLOCK..................................................................................................................................... 112
GPIO OUTPUTS FROM FLL....................................................................................................................................... 113
EXAMPLE FLL CALCULATION................................................................................................................................... 113
EXAMPLE FLL SETTINGS.......................................................................................................................................... 114
GENERAL PURPOSE INPUT/OUTPUT (GPIO) ......................................................... 115
IRQ/GPIO1................................................................................................................................................................... 115
GPIO2.......................................................................................................................................................................... 116
GPIO3.......................................................................................................................................................................... 116
BCLK/GPIO4................................................................................................................................................................ 117
INTERRUPTS.............................................................................................................. 118
USING IN1L AND IN1R AS INTERRUPT INPUTS...................................................................................................... 122
CONTROL INTERFACE.............................................................................................. 123
CONTROL WRITE SEQUENCER............................................................................... 125
INITIATING A SEQUENCE.......................................................................................................................................... 125
PROGRAMMING A SEQUENCE ................................................................................................................................ 126
DEFAULT SEQUENCES............................................................................................................................................. 129
START-UP SEQUENCE.............................................................................................................................................. 129
SHUTDOWN SEQUENCE........................................................................................................................................... 131
POWER-ON RESET.................................................................................................... 133
QUICK START-UP AND SHUTDOWN........................................................................ 135
QUICK START-UP (DEFAULT SEQUENCE).............................................................................................................. 135
FAST START-UP FROM STANDBY ........................................................................................................................... 135
QUICK SHUTDOWN (DEFAULT SEQUENCE)........................................................................................................... 136
SOFTWARE RESET AND CHIP ID............................................................................. 137
REGISTER MAP................................................................................................ 138
REGISTER BITS BY ADDRESS ................................................................................. 142
APPLICATIONS INFORMATION ...................................................................... 181
RECOMMENDED EXTERNAL COMPONENTS ......................................................... 181
MIC DETECTION SEQUENCE USING MICBIAS CURRENT..................................... 183
PACKAGE DIMENSIONS.................................................................................. 185
IMPORTANT NOTICE ....................................................................................... 187
ADDRESS ................................................................................................................... 187
REVISION HISTORY ......................................................................................... 188
PP, Rev 3.3, September 2012
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