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WM8904CGEFL/V 参数 Datasheet PDF下载

WM8904CGEFL/V图片预览
型号: WM8904CGEFL/V
PDF下载: 下载PDF文件 查看货源
内容描述: 超低功耗编解码器用于便携式音频应用 [Ultra Low Power CODEC for Portable Audio Applications]
分类和应用: 解码器编解码器电信集成电路便携式PC
文件页数/大小: 188 页 / 1824 K
品牌: WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
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Pre-Production  
WM8904  
DIGITAL MICROPHONE INTERFACE  
The WM8904 supports a stereo digital microphone interface. This may be provided on DMICDAT1 or  
on DMICDAT2, as selected by the DMIC_SRC register bit. The analogue signal path from the  
selected input pin must be disabled when using the digital microphone interface; this is achieved by  
configuring or disabling the associated input PGA.  
The two-channel audio data is multiplexed on the selected input pin. The associated clock,  
DMICCLK, is provided on a GPIO pin.  
The Digital Microphone Input is selected as input by setting the DMIC_ENA bit. When the Digital  
Microphone Input is selected, the ADC is bypassed.  
The digital microphone interface configuration is illustrated in Figure 27.  
Note that care must be taken to ensure that the respective digital logic levels of the microphone are  
compatible with the digital input thresholds of the WM8904. The digital input thresholds are  
referenced to DBVDD, as defined in “Electrical Characteristics”. It is recommended to power the  
digital microphones from DBVDD.  
Figure 27 Digital Microphone Interface  
When any GPIO pin is configured as DMIC Clock output, the WM8904 outputs a clock, which  
supports Digital Microphone operation at the ADC sampling rate. The ADC and Record Path filters  
must be enabled and the ADC sampling rate must be set in order to ensure correct operation of all  
DSP functions associated with the digital microphone. Volume control for the Digital Microphone  
Interface signals is provided using the ADC Volume Control.  
See “Analogue-to-Digital Converter (ADC)” for details of the ADC Enable and volume control  
functions. See “General Purpose Input/Output (GPIO)” for details of configuring the DMICCLK output.  
See “Clocking and Sample Rates” for details of the sample rate control.  
When the DMIC_ENA bit is set, then the IN1L/DMICDAT1 or IN1R/DMICDAT2 pin is used as the  
digital microphone input DMICDAT. Up to two microphones can share each pin; the two microphones  
are interleaved as illustrated in Figure 28.  
PP, Rev 3.3, September 2012  
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