WM8850
Pre-Production
Output Amplifier Capabilities Response Format (PID = 12h)
Bit
Bitfield Name
Mute Capable
Rsvd
RW
R
Default
1
Description
[31]
DAC Volume control is capable of muting
Reserved
[30:23]
[22:16]
[15]
R
0000h
01h
0
Step Size
Rsvd
R
Gain step size is 0.5dB
R
Reserved
[14:8]
[7]
Num Steps
Rsvd
R
7Fh
0
Number of steps in gain range is 128 (0dB to -63.5dB)
Reserved
R
[6:0]
Offset
R
7Fh
The step number that 0dB corresponds to is 7Fh
Supported Power States Response Format (PID = 0Fh)
Bit
Bitfield Name
EPSS
RW
R
Default
Description
[31]
[30]
0
1
EPSS not supported
CLKSTOP
R
Indicates that the link BCLK can be stopped when the WM8850 is in power
state D3. The WM8850 will still perform jack detection and issue a wake
the Presence Detect value of a node (in its Pin Sense Verb) has changed.
Note: The Power State Verb for the AFG should be queried before actually
stopping BCLK to ensure it is acceptable to do so
[29:5]
[4]
Rsvd
R
R
R
R
R
R
0000000h Reserved
D4Sup
D3Sup
D2Sup
D1sup
D0Sup
1
1
1
1
1
D4 Power State supported
[3]
D3 Power State supported
D2 Power State supported
D1 Power State supported
D0 Power State supported
[2]
[1]
[0]
GPI/O Count Response Format (PID = 11h)
Bit
Bitfield Name
RW
Default
Description
[31]
GPIO Wake
R
1
Indicates that a GPIO configured as an input can cause a wake (i.e.
generate a Status Change event on the HDA Link)
[30]
GPIO Unsol
R
1
Indicates that a GPIO configured as an input can cause an Unsolicited
Response to be generated
[29:24]
[23:16]
[15:8]
[7:0]
Rsvd
R
R
R
R
00h
00h
00h
02h
Reserved
Num GPIs
Num GPOs
Num GPIOs
Device does not support any GPI pins
Device does not support any GPO pins
Device supports 2 GPIO pins
PP, April 2011, Rev 3.2
88
w
WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
