WM8850
Pre-Production
SAMPLE RATE
8kHz
BASE
0h
MULT
0h
DIV
5h
3h
2h
1h
1h
2h
0h
0h
0h
0h
0h
0h
11.025kHz
16kHz
1h
0h
0h
0h
22.05kHz
24kHz
1h
0h
0h
0h
32kHz
0h
1h
44.1kHz
48kHz
1h
0h
0h
0h
88.2kHz
96kHz
1h
1h
0h
1h
176.4kHz
192kHz
1h
3h
0h
3h
Table 21 DAC1 Supported Sample Rate Settings
Note: Other settings of Base, Mult and Div are reserved and should not be set.
DAC1 provides digital gain, allowing the signal level to be adjusted between 0dB and −63.5dB in
0.5dB steps. Gain can be applied to left and right channels independently if required. Additionally, a
digital softmute function is available – again this can be applied to separate channels as required.
The gain of DAC1 is controlled using the Amplifier Gain/Mute Verb.
Note: When Port-A is configured to drive headphones (H-Phn Enable = 1) the actual gain settings
applied will be adjusted by a further −8.0dB. This changes the effective gain range to −71.5dB to
−8.0dB.
Under default conditions, the DAC1 node will process data received from the HDA interface. It is also
possible to select S/PDIF Rx as the data source, using the vendor-specific Internal Path Verb.
Note that, when the S/PDIF Rx node is selected as the input to any of DAC1, DAC2 or DAC3, the
Internal Path Verbs in all the other DAC nodes are updated to use the S/PDIF Rx node also. It is not
possible to route the HDA Link to any DAC at the same time as routing the S/PDIF Rx node to
another DAC.
When the S/PDIF Rx node is selected as the input to the DAC nodes, the Stream Format Verb for
each DAC node becomes read-only and is set according to the settings in the S/PDIF Rx node.
SET VERB
BIT
BITFIELD
NAME
DEFAULT
DESCRIPTION
773h
7:0
Path Sel
00h
Selects source of DAC1 node:
00h = DAC1 takes data from HDA Link
05h = DAC1 takes data from S/PDIF Rx
All other values of Path Sel are reserved.
Note: When using the Internal Path Verb to use S/PDIF Rx as the data source of DAC1 it is
recommended that the S/PDIF Rx node (NID=05h) is enabled after setting Path Sel=05h. Failure to
do so may result in a one sample delay between left and right channels.
PP, April 2011, Rev 3.2
52
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
