Pre-Production
WM8850
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
10h
11h
12h
13h
14h
15h
16h
17h
Connection List Length Parameter (PID = 0Eh)
Bit
Bitfield Name
Rsvd
RW
R
Default
000000h
0
Description
[31:8]
[7]
Reserved
Long Form
R
Indicates that the connection list items are in short form
Indicates that there is 1 NID entry in the connection list
[6:0]
Connection List
Length
R
01h
GET CONNECTION LIST ENTRY VERB
Verb ID
Payload [7:0]
Response[31:0]
Get
F02h
00h
Bits [31:0] in the table below
Bit
Bitfield Name
RW
R
Default
00h
Description
[31:24]
[23:16]
[15:8]
[7:0]
Conn List Entry 3
Conn List Entry 2
Conn List Entry 1
Conn List Entry 0
Unused connection list entry
Unused connection list entry
Unused connection list entry
R
00h
R
00h
R
17h
Indicates that the Port-H Pin Widget connects to the S/PDIF Tx 2 Widget
(NID = 17h)
PIN WIDGET CONTROL VERB
Verb ID
F07h
Payload [7:0]
00h
Response[31:0]
Get
Set
Bits [31:0] in the table below
00000000h
707h
Bits [7:0] in the table below
Bit
Bitfield Name
Rsvd
RW
R
Default
Description
[31:8]
[7]
000000h
Reserved
H-Phn Enable
Out Enable
R
0
0
Not applicable as this in an input port
Controls the output path:
0 = Output path is disabled
1 = Output path is enabled
Controls the input path:
0 = Input path is disabled
1 = Input path is enabled
Reserved
[6]
RW
[5]
In Enable
RW
1
[4:3]
[2:0]
Rsvd
R
R
0h
0h
VRefEn
Selectable VRef not supported
Note: It is erroneous behaviour for both the Out Enable and In Enable registers to be set high simultaneously. If both registers
are set, Port-H defaults to an input.
PP, April 2011, Rev 3.2
209
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