WM8850
Pre-Production
PIN DESCRIPTION
PIN NO
1
NAME
VIN1LP
VIN1LN
VIN1RP
VIN1RN
VIN2LP
VIN2LN
VIN2RP
VIN2RN
MICBIAS
GPIO1
TYPE
Analogue input
Analogue input
Analogue input
Analogue input
Analogue input
Analogue input
Analogue input
Analogue input
Analogue output
Digital input / output
Digital input / output
Digital input
DESCRIPTION
Left channel 1 positive input
Left channel 1 negative input
2
Right channel 1 positive input
Right channel 1 negative input
Left channel 2 positive input
Left channel 2 negative input
Right channel 2 positive input
Right channel 2 negative input
Microphone bias output
3
4
5
6
7
8
9
General purpose digital input/output 1
General purpose digital input/output 2
S/PDIF Input
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
GPIO2
SPDIFIN
/RESET
SYNC
Digital input
Global reset (active low)
Digital input
HDA frame sync, 48kHz
Digital input
Serial data output from HDA controller
HDA Link bit clock, 24MHz
Serial data input to HDA controller
S/PDIF output 1
SDO
Digital input
BCLK
Digital input / output
Digital output
SDI
SPDIFOUT1
DBVDD
DGND
Supply input
Digital buffer supply input
Supply input
Digital ground (return for DBVDD and DCVDD)
Digital core supply input
Supply input
DCVDD
DMICCLK
DMICDAT1
Digital output
Digital microphone clock output
Digital microphone data input 1
Digital input
Digital input / output
Digital microphone data input 2 /
S/PDIF output 2
DMICDAT2/
SPDIFOUT2
Analogue output
Analogue output
Analogue output
Analogue output
Analogue output
Analogue output
Analogue output
Analogue output
Analogue output
Analogue output
Supply output
Right channel 3 negative output
Right channel 3 positive output
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
VOUT3RN
VOUT3RP
VOUT3LN
VOUT3LP
VOUT2RN
VOUT2RP
VOUT2LN
VOUT2LP
VOUT1R
VOUT1L
HPVSS
Left channel 3 negative output
Left channel 3 positive output
Right channel 2 negative output
Right channel 2 positive output
Left channel 2 negative output
Left channel 2 positive output
Right channel 1 output
Left channel 1 output
Charge pump negative supply decoupling point
Charge pump positive supply decoupling point
Charge pump flyback capacitor pin 2
Charge pump ground (return path for HPVDD and HPVSS)
Charge pump flyback capacitor pin 1
Supply output
HPVDD
Analogue output
Supply input
CFB2
HPGND
CFB1
Analogue output
Supply output
Internally generated regulated charge pump supply decoupling point
Charge pump supply input
CPCAP
Supply input
CPVDD
Supply input
Analogue ground (return path for AVDD and CPVDD)
Analogue supply input
AGND
Supply input
AVDD
Analogue output
Analogue output
Analogue output
Analogue output
Analogue output
Analogue positive reference decoupling point
Midrail voltage decoupling point
VREFP
VMID
Analogue negative reference decoupling point
Jack detect sense 1
VREFN
JACKDET1
JACKDET2
Jack detect sense 2
PP, April 2011, Rev 3.2
10
w
WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
