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WM8772_05 参数 Datasheet PDF下载

WM8772_05图片预览
型号: WM8772_05
PDF下载: 下载PDF文件 查看货源
内容描述: 24位, 192kHz的6通道编解码器,带有音量控制 [24-bit, 192kHz 6-Channel Codec with Volume Control]
分类和应用: 解码器编解码器
文件页数/大小: 73 页 / 758 K
品牌: WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
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Production Data  
WM8772EDS – 28 LEAD SSOP  
POWERDOWN MODE AND ADC/DAC DISABLE  
Setting the PDWN register bit immediately powers down the DAC’s on the WM8772EDS, overriding  
the DACD powerdown bits control bits. All trace of the previous input samples are removed, but all  
control register settings are preserved. When PDWN is cleared the digital filters will be reinitialised  
REGISTER ADDRESS  
0000010  
BIT  
LABEL  
DEFAULT  
DESCRIPTION  
Power Down all DAC’s Select:  
0: All DAC’s enabled  
2
PDWN  
0
Powerdown Control  
1: All DAC’s disabled  
The ADC and DACs may also be powered down individually by setting the ADCPD and DACPD  
disable bits. Setting ADCD will disable the ADC and select a low power mode. The ADC digital filters  
will be reset and will reinitialise when ADCPD is unset. Each Stereo DAC channel has a separate  
disable DACPD[2:0]. Setting DACPD for a channel will disable the DACs and select a low power  
mode.  
REGISTER ADDRESS  
0001010  
BIT  
LABEL  
DEFAULT  
DESCRIPTION  
ADC Disable:  
0
ADCPD  
0
Powerdown Control  
0: Active  
1: Disable  
3:1 DACPD[2:0]  
000  
DAC Disable  
DACPD [2:0]  
000  
DAC CHANNEL 1  
Active  
DAC CHANNEL 2  
DAC CHANNEL 3  
Active  
Active  
Active  
001  
DISABLE  
Active  
Active  
010  
DISABLE  
DISABLE  
Active  
Active  
011  
DISABLE  
Active  
Active  
100  
DISABLE  
DISABLE  
DISABLE  
DISABLE  
101  
DISABLE  
Active  
Active  
110  
DISABLE  
DISABLE  
111  
DISABLE  
MASTER POWERDOWN  
This control bit powers down the references for the whole chop. Therefore for complete powerdown,  
both the ADC and DACs should be powered down first before setting this bit.  
REGISTER ADDRESS  
0001010  
BIT  
LABEL  
DEFAULT  
DESCRIPTION  
Master Power Down Bit:  
0: Not powered down  
1: Powered down  
4
PWRDNALL  
0
Interface Control  
MASTER MODE SELECT  
Control bit MS selects between audio interface Master and Slave Modes. In Master mode LRC and  
BCLK are outputs and are generated by the WM8772EDS. In Slave mode LRC and BCLK are inputs  
to WM8772EDS.  
REGISTER ADDRESS  
0001010  
BIT  
LABEL  
DEFAULT  
DESCRIPTION  
5
MS  
0
DAC Audio Interface Master/Slave  
Mode Select:  
Interface Control  
0: Slave mode  
1: Master mode  
PD Rev 4.2 October 2005  
35  
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