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WM8753LEB/V 参数 Datasheet PDF下载

WM8753LEB/V图片预览
型号: WM8753LEB/V
PDF下载: 下载PDF文件 查看货源
内容描述: HI FI和电话双CODEC [HI FI AND TELEPHONY DUAL CODEC]
分类和应用: 电话
文件页数/大小: 87 页 / 1033 K
品牌: WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
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WM8753L  
Advanced Information  
REGISTER  
ADDRESS  
BIT  
2:1  
LABEL  
DEEMP  
DEFAULT  
00  
DESCRIPTION  
De-emphasis Control  
R1 (01h)  
DAC Control  
[1:0]  
11 = 48kHz sample rate  
10 = 44.1kHz sample rate  
01 = 32kHz sample rate  
00 = No De-emphasis  
DACMU  
1
Digital Soft Mute  
1 = mute  
3
0 = no mute (signal active)  
Table 28 HiFi DAC Control  
The digital audio data is converted to oversampled bit streams in the on-chip, true 24-bit digital  
interpolation filters. The bitstream data enters two multi-bit, sigma-delta DACs, which convert them to  
high quality analogue audio signals. The multi-bit DAC architecture reduces high frequency noise and  
sensitivity to clock jitter. It also uses a Dynamic Element Matching technique for high linearity and low  
distortion.  
In normal operation, the left and right channel digital audio data is converted to analogue in two  
separate DACs. There is also a mono-mix mode where the two audio channels are mixed together  
digitally, controlled by the DMONOMIX register bits which allow the digital mono mix to be applied to  
left, right or both DAC channels. If only one DAC channel is being used for the mono mix the other  
can be powered down.  
The DAC output defaults to non-inverted. Setting DACINV will invert the DAC output phase on both  
left and right channels.  
REGISTER  
ADDRESS  
BIT  
5:4  
LABEL  
DEFAULT  
DESCRIPTION  
DAC Mono Mix  
R1 (01h)  
DAC Control  
DMONOMIX  
[1:0]  
00  
00: stereo  
01: mono ((L+R)/2) into DACL, ‘0’ into  
DACR  
10: mono ((L+R)/2) into DACR, ‘0’ into  
DACL  
11: mono ((L+R)/2) into DACL and  
DACR  
DACINV  
0
DAC Phase Invert  
0 : non-inverted  
1 : inverted  
6
Table 29 HiFi DAC Mono Mix and Phase Invert Select  
AI Rev 3.1 June 2004  
39  
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