WM8750L
Production Data
DESCRIPTION
Right Volume Update
REGISTER
ADDRESS
BIT
LABEL
RIVU
DEFAULT
R1 (01h)
Right Channel
PGA
8
0
0 = Store RINVOL in intermediate
latch (no gain change)
1 = Update left and right channel
gains (right = RINVOL, left =
intermediate latch)
RINMUTE
RIZC
Right Channel Input Analogue Mute
1 = Enable Mute
7
1
0
0 = Disable Mute
Note: RIVU must be set to un-mute.
Right Channel Zero Cross Detector
1 = Change gain on zero cross only
0 = Change gain immediately
Right Channel Input Volume Control
111111 = +30dB
6
RINVOL
[5:0]
5:0
010111
( 0dB )
111110 = +29.25dB
. . 0.75dB steps down to
000000 = -17.25dB
R23 (17h)
TOEN
Timeout Enable
0
0
Additional
Control (1)
0 : Timeout Disabled
1 : Timeout Enabled
Table 9 Input PGA Software Control
ANALOGUE TO DIGITAL CONVERTER (ADC)
The WM8750L uses a multi-bit, oversampled sigma-delta ADC for each channel. The use of multi-bit
feedback and high oversampling rates reduces the effects of jitter and high frequency noise. The ADC
Full Scale input level is proportional to AVDD. With a 3.3V supply voltage, the full scale level is 1.0
Volts r.m.s. Any voltage greater than full scale may overload the ADC and cause distortion.
ADC DIGITAL FILTER
The ADC filters perform true 24 bit signal processing to convert the raw multi-bit oversampled data
from the ADC to the correct sampling frequency to be output on the digital audio interface. The digital
filter path is illustrated in Figure 9.
TO DIGITAL
AUDIO
DIGITAL
HPF
DIGITAL
DECIMATOR
DIGITAL
FILTER
FROM ADC
INTERFACE
ADCHPD
Figure 9 ADC Digital Filter
The ADC digital filters contain a digital high pass filter, selectable via software control. The high-pass
filter response is detailed in the Digital Filter Characteristics section. When the high-pass filter is
enabled the dc offset is continuously calculated and subtracted from the input signal. By setting
HPOR, the last calculated dc offset value is stored when the high-pass filter is disabled and will
continue to be subtracted from the input signal. If the DC offset is changed, the stored and
subtracted value will not change unless the high-pass filter is enabled. This feature can be used for
calibration purposes. In addition the highpass filter may be enabled separately on the left and right
channels (see Table 11).
PD, Rev 4.4, August 2012
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
