WM8741
Production Data
It is recommended that the device is muted before the filter response is changed to prevent noise as
the filters are reset from appearing on the outputs.
Full details of these filters are described in Table 68 and Figure 60 to Figure 67.
DSD DIRECT DIGITAL FILTERS
The DSD Direct filters have been designed to provide the minimal of processing to the data with no
decimation, re-quantisation or noise-shaping, in order to preserve the signal integrity as much as
possible. As a result the filters have a wide bandwidth and a very gradual attenuation. It is
recommended that whichever DSD Direct filter is chosen it is augmented by analogue post-DAC
filtering in order to adhere to the Scarlet-Book SACD standard.
There are a total of four DSD Direct filter responses available, controlled by two register bits as
described in Table 41 below:
REGISTER ADDRESS
BIT
LABEL
DSD_NO_
NOTCH
DEFAULT
DESCRIPTION
DSD Direct 8fs Notch Filter
0: Enable 8fs notch filter
1: Disable 8fs notch filter
DSD Direct Filter Gain
0: High gain
R32
Additional Control 1
20h
0
0
1
DSD_
1
LEVEL
1: Low gain
Table 41 DSD Direct Digital Filter Selection
DSD MUTE CONTROL
In DSD Direct mode, an analogue mute can be applied at the output of the DAC. This is controlled
by register bit AMUTE.
REGISTER ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
DSD Direct mute control:
0 = mute off
R4
Volume Control
04h
7
AMUTE
0
1 = mute on
Table 42 DSD Analogue Mute Control
POWER SAVING STANDBY CONTROL
Setting the PWDN register bit immediately connects all outputs to VMID and resets the digital sections
of the DAC system including the DLL, the audio interface and the DSP. Input data samples are not
preserved, but all control register settings are maintained. When PWDN is cleared the WM8741 will
repeat its power-on initialisation sequence.
REGISTER ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
Power Down Mode Select:
0 = Normal Mode
R5
Format Control
05h
7
PWDN
0
1 = Power Down Mode
Table 43 Powerdown Control
PD, Rev 4.2, October 2009
38
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