WM8740
Production Data
DEVICE DESCRIPTION
The WM8740 is a high performance 128fs oversampling rate stereo DAC employing a novel 64 level
sigma delta DAC design which provides optimised signal-to-noise performance and clock jitter
tolerance. It is ideally suited to high quality audio applications such as CD, DVD-audio, home theatre
receivers and professional mixing consoles. The WM8740 supports sample rates from 8ks/s to
192ks/s.
The control functions of the WM8740 are either pin selected (hardware mode) or programmed via the
serial interface (software mode). Control functions that are available include: data input word length
and format selection (16-24 bits: I2S, left justified or right justified): de-emphasis sample rate
selection (48kHz, 44.1kHz and 32kHz); differential output modes; a software or hardware mute and
independently digitally controllable attenuation on both channels.
The digital filtering may be bypassed entirely by selecting MODE8X. Data is then input directly to the
DAC, bypassing the digital filters. Left and right channels are input separately, using the MODE pin
as the right channel input. This mode allows the use of alternative digital filters, such as the Pacific
Microsonics PMD100 HDCD filter.
In addition to the normal stereo operating mode the WM8740 may also be used in dual differential
mode with either the left or right channel (selectable) being output dual differentially. Two WM8740s
can then be used in parallel to implement a stereo channel, each supporting a single channel
differentially. Note that this mode uses 2 pairs of differential outputs for each channel – the benefit is
SNR improved by 3dB. This mode is available in both software and hardware modes and may also
be used in conjunction with MODE8X.
SYSTEM CLOCK
Sample rates from 8ks/s up to 96ks/s are available, and automatically selected, with a system clock
of 256fs or 384fs. In addition a system clock of 128fs or 192fs may be used, with sample rates up to
192ks/s. With a 128fs or 192fs system clock 64x oversampling mode operation is automatically
selected and the first stage of the digital filter is bypassed.
WM8740 has an asynchronous monitor circuit, which in the event of removal of the master system
clock, resets the digital filters and analogue circuits, muting the output. Re-application of the system
clock re-starts the filters from an intitialised state. Control registers are not reset under this condition.
The WM8740 is tolerant of asynchronous bit clock jitter. The internal signal processing
resynchronises to the external LRCIN once the phase difference between bit clock and the system
clock exceeds half an LRCIN period. During this re-synch period the interpolating filters will either
miss or repeat an audio sample, minimising the audible effects of the operation. Table 1 shows the
typical system clock frequency inputs for the WM8740.
SAMPLING
RATE
SYSTEM CLOCK FREQUENCY (MHZ)
128fs
192fs
256fs
384fs
512fs
768fs
(LRCIN)
32kHz
4.096
5.6448
6.114
6.144
8.467
8.192
11.2896
12.288
24.576
12.288
16.9340
18.432
36.864
16.384
22.5792
24.576
24.576
33.8688
36.864
44.1kHz
48kHz
9.216
96kHz
12.288
24.576
18.432
36.864
Unavailable Unavailable
192kHz
Unavailable Unavailable Unavailable Unavailable
Table 1 System Clock Frequencies Versus Sampling Rate
AUDIO DATA INTERFACE
Data may be input at a rate corresponding to the system clock having a rate of 256fs or 384fs, in
which case an oversampling ratio of 128x is selected. Alternatively a rate of 128fs or 192fs may be
used, in which case the first filter stage is bypassed and an oversampling ratio of 64x results. Finally,
in MODE8X, data may be input at 8x the normal rate, in which case separate input pins are used to
input the two stereo channels of data (unless DIFFHW mode and MODE8X are both selected, in
which case only a mono channel is converted differentially). In MODE8X all filter stages are by-
passed, prior to the sigma delta modulator, MODE8X is not supported at 192kHz sampling rate. Data
is input MSB first in all modes.
PD Rev 4.0 April 2004
9
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
