WM8731 / WM8731L
Production Data
The device can be powered off by writing to the POWEROFF bit of the Power Down register. In
POWEROFF mode the Control Interface and a small portion of the digital remain active. The
analogue VMID reference is disabled. As in STANDBY mode the crystal oscillator and/or CLKOUT
pin can be independently controlled. Refer to Table 28.
DESCRIPTION
1
1
1
0
1
1
0
0
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
POWEROFF, but with Crystal
Oscillator OS and CLKOUT
available
POWEROFF, but with Crystal
Oscillator OS available, CLKOUT
not-available
POWEROFF, Crystal oscillator
and CLKOUT not-available.
Table 28 Poweroff Mode
REGISTER MAP
The complete register map is shown in Table 29. The detailed description can be found in Table 30
and in the relevant text of the device description. There are 11 registers with 16 bits per register (7 bit
address + 9 bits of data). These can be controlled using either the 2 wire or 3 wire MPU interface.
REGISTER
BIT[8]
BIT[7]
BIT[6]
BIT[5]
BIT[4]
BIT[3]
BIT[2]
BIT[1]
BIT[0]
DEFAULT
R0 (00h)
LRINBOTH
LINMUTE
0
0
LINVOL[4:0]
0_1001_0111
Left Line In
R1 (01h)
Right Line In
RLINBOTH
LRHPBOTH
RINMUTE
LZCEN
0
0
RINVOL[4:0]
0_1001_0111
0_0111_1001
R2 (02h)
Left
Headphone Out
LHPVOL[6:0]
RHPVOL[6:0]
BYPASS
R1 (01h)
Right
Headphone Out
RLHPBOTH
RZCEN
0_0111_1001
0_0000_1010
0_0000_1000
0_1001_1111
0_1001_1111
0_0000_0000
0_0000_0000
not reset
R4 (04h)
Analogue Audio
Path Control
0
0
0
0
0
0
SIDEATT[1:0]
SIDETONE
0
DACSEL
HPOR
OUTPD
LRP
INSEL
MUTEMIC
MICPD
MICBOOST
ADCHPD
R5 (05h)
Digital Audio
Path Control
0
0
DACMU
DEEMPH[1:0]
R6 (06h)
Power Down
Control
POWEROFF CLKOUTPD
OSCPD
LRSWAP
DACPD
ADCPD
LINEINPD
R7 (07h)
Digital Audio
Interface Format
BCLKINV
CLKODIV2
0
MS
CLKIDIV2
0
IWL[1:0]
FORMAT[1:0]
R8 (08h)
Sampling
Control
SR[3:0]
BOSR
0
USB/
NORMAL
R9 (09h)
Active Control
0
0
0
0
Active
R15 (0Fh)
RESET[8:0]
Reset
Table 29 Register Map
PD, Rev 4.8, April 2009
49
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